EPM7192SQC160-15 vs EPM7192SQC160-10 Comparison
Detailed side-by-side comparison of EPM7192SQC160-15 by Altera and EPM7192SQC160-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7192SQC160-10 - 192-Macro MAX 7000S CPLD, 100MHz, PQFP-160 | Intel / Altera
EPM7192SQC160-10 NrndSpecification Comparison
| Parameter | EPM7192SQC160-15 | EPM7192SQC160-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | NRND |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Number of Macrocells | 192 | — |
| Number of Logic Array Blocks | 4 | — |
| Number of Usable Gates | 3750 | — |
| User I/O Pins | 124 | — |
| Pin-to-Pin Logic Delay (tPD) | 15 ns | — |
| Maximum Operating Frequency | 76.9 MHz | 100 MHz |
| Supply Voltage | 5.0 V | — |
| Programmability | In-System (ISP) via JTAG IEEE Std 1149.1 | — |
| Configuration Memory | EEPROM, non-volatile | — |
| Package | PQFP-160 | PQFP-160 (SQC) 28x28 mm |
| Mounting Type | Surface Mount | — |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | — |
| Process Technology | CMOS, EEPROM-based | — |
| Macrocells | — | 192 |
| Logic Array Blocks (LABs) | — | 4 |
| User I/Os | — | 124 |
| Usable Gates | — | 3750 |
| Propagation Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Program Memory Type | — | EEPROM |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |
| Pin/Package Type | — | Surface Mount, Gull-Wing |
| Operating Temperature (Commercial) | — | 0C to +70C |
| RoHS Status | — | [DATA_NEEDED: RoHS status] |
| Lead Finish | — | [DATA_NEEDED: lead finish] |