EPM7256SQC208-10 vs EPM7256AEQC208-5N Comparison
Detailed side-by-side comparison of EPM7256SQC208-10 by Intel and EPM7256AEQC208-5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7256SQC208-10 | EPM7256AEQC208-5N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Type | Complex Programmable Logic Device (CPLD) | — |
| Family / Series | MAX 7000 | — |
| Macrocells | 256 | 256 |
| Logic Array Blocks (LABs) | 16 | — |
| Usable Gates | 5000 | 5,000 |
| User I/O Pins | 164 | — |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | 5.5 ns |
| Supply Voltage | 5.0 V | — |
| Configuration Technology | EEPROM | — |
| Package | 208-pin PQFP | 208-pin PQFP (Plastic Quad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| In-System Programmability | Yes (ISP) | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | unknown |
| Moisture Sensitivity Level (MSL) | [DATA_NEEDED: MSL level] | — |
| Speed Grade | -10 (10 ns) | -5 |
| Family | — | MAX 7000A |
| Logic Family / Base Technology | — | CMOS, EEPROM-based |
| User I/Os | — | 164 |
| Dedicated Inputs | — | 16 |
| Number of Pins | — | 208 |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Maximum Internal Frequency | — | 172.4 MHz |
| Operating Temperature | — | 0 C to +70 C (Commercial) |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) / ISP |
| MSL Level | — | [DATA_NEEDED: MSL Level] |