EPM7256SRC208-7 vs EPM7256SQC208-15 Comparison
Detailed side-by-side comparison of EPM7256SRC208-7 by Altera and EPM7256SQC208-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7256SRC208-7 | EPM7256SQC208-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | NRND |
| Family | MAX 7000S | MAX 7000S |
| Device Type | EEPROM-based Complex Programmable Logic Device (CPLD) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | 5000 |
| User I/O Pins | 164 | 164 |
| Pin-to-Pin Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency (fMAX) | 128.2 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 5 V | — |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| Package | 208-pin RQFP (PowerQuad Flat Pack) | 208-pin PQFP (28x28 mm) |
| Package Code | FQFP | — |
| Terminal Form | Gull Wing | — |
| Number of Terminals | 208 | — |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (0C to +70C) | — |
| Speed Grade | -7 (fastest standard grade) | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | Contains lead / RoHS non-compliant (per third-party listing) |
| Packaging | Tray | — |
| Series | — | EPM7256 |
| Logic Array Blocks (LABs) | — | 16 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| Operating Temperature Range | — | 0 C to +70 C (Commercial) |
| Programmable Power Mode | — | Yes (per-macrocell turbo-bit) |
| JTAG (IEEE 1149.1) Boundary-Scan | — | Yes |
| In-System Programmability (ISP) | — | Yes |
| Lead-Free Status | — | Contains lead |