EPM9320RC208-15N vs EPM9480RC208-15N Comparison
Detailed side-by-side comparison of EPM9320RC208-15N by Intel and EPM9480RC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320RC208-15N | EPM9480RC208-15N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 6,000 | 10,000 |
| Macro Cells | 320 | 480 |
| Flip-Flops | 484 | — |
| Configurable I/O Lines | 128 | — |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Clock Frequency | 117.6 MHz | — |
| Supply Voltage | 5.0 V | 5.0 V |
| I/O Voltage Compatibility | 3.3 V or 5 V | — |
| Configuration Technology | CMOS EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes (ISP via JTAG) |
| Package | 208-pin RQFP (PowerQuad Flat Pack) | 208-pin RQFP |
| Terminal Pitch | 0.5 mm | — |
| Operating Temperature Range | 0C to +70C (commercial) | — |
| Mounting Type | Surface Mount | Surface Mount |
| Packaging | Tray | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | ROHS3 Compliant |
| Maximum Frequency | — | 117.6 MHz |
| Propagation Delay | — | 15 ns (speed grade -15) |
| Configuration Memory | — | EEPROM (non-volatile) |
| JTAG Interface | — | IEEE Std. 1149.1 |
| Operating Temperature | — | [DATA_NEEDED: operating temperature range] |
| Moisture Sensitivity Level | — | MSL 3 (168 Hours) |
| Manufacturer Standard Lead Time | — | 1-7 Days |
| Architecture | — | Multiple Array MatriX (MAX) third-generation |