EPM9480RC208-15N vs EPM9320RC208-15 Comparison
Detailed side-by-side comparison of EPM9480RC208-15N by Altera and EPM9320RC208-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9480RC208-15N | EPM9320RC208-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 10,000 | 6,000 |
| Macro Cells | 480 | 320 |
| Maximum Frequency | 117.6 MHz | — |
| Propagation Delay | 15 ns (speed grade -15) | — |
| Supply Voltage | 5.0 V | 5.0 V |
| Package | 208-pin RQFP | 208-pin RQFP (Power QFP) |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (ISP via JTAG) | Yes (ISP via JTAG) |
| JTAG Interface | IEEE Std. 1149.1 | IEEE Std. 1149.1 |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| RoHS Status | ROHS3 Compliant | [DATA_NEEDED: RoHS status] |
| Moisture Sensitivity Level | MSL 3 (168 Hours) | — |
| Manufacturer Standard Lead Time | 1-7 Days | — |
| Architecture | Multiple Array MatriX (MAX) third-generation | — |
| Device Family | — | MAX 9000 |
| Pin-to-Pin Propagation Delay | — | 15 ns (speed grade -15) |
| Maximum Clock Frequency | — | 117.6 MHz |
| Configuration Technology | — | EEPROM-based (non-volatile) |
| Package Type | — | 208-BFQFP Exposed Pad |
| Number of I/O Pins | — | [DATA_NEEDED: user I/O count] |
| Logic Array Blocks | — | [DATA_NEEDED: LAB count] |
| Lifecycle Status | — | Obsolete (PDN0706, 2007) |