EPM9560RC208-20N vs EPM9560RC208-15N Comparison

Detailed side-by-side comparison of EPM9560RC208-20N by Intel and EPM9560RC208-15N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPM9560RC208-15N EPM9560RC208-15N - 560-Macrocell MAX 9000 CPLD, 15ns, 208-RQFP

EPM9560RC208-15N - 560-Macrocell MAX 9000 CPLD, 15ns, 208-RQFP

EPM9560RC208-15N ⚠ Last Time Buy

Specification Comparison

Parameter EPM9560RC208-20N EPM9560RC208-15N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last Time Buy
Device Family MAX 9000 (EPM9560) —
Macrocells 560 560
Usable Gates 12,000 12,000
Propagation Delay (tPD) 20 ns —
Package 208-pin RQFP (PowerQuad Flat Pack) 208-pin RQFP (Power Quad Flat Pack)
User I/O Pins 149 —
Supply Voltage 5.0 V —
Configuration Technology EEPROM (non-volatile) —
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG —
JTAG Interface IEEE Std. 1149.1 —
Mounting Type Surface Mount Surface Mount
Operating Temperature [DATA_NEEDED: operating temperature range] —
RoHS Status Lead-free (N suffix) [DATA_NEEDED: check part marking suffix for lead-free/RoHS]
Logic Architecture Multiple Array MatriX (MAX), third-generation CMOS EEPROM —
Flip-Flops 772 (per EPM9560 series data) —
Speed Grade -20 (20 ns) -15 (15 ns tPD)
MSL Level [DATA_NEEDED: MSL level] —
Series — MAX 9000
Device Type — CPLD (Complex Programmable Logic Device)
Logic Array Blocks (LABs) — 16
User I/O — 212 (in 208-RQFP, see family datasheet)
Pin-to-Pin Delay (tPD) — 15 ns
Maximum Internal Frequency — 117.6 MHz
Supply Voltage (VCCINT) — 5.0 V
Programmability — In-system via IEEE 1149.1 JTAG
Configuration Memory — CMOS EEPROM (non-volatile)
Operating Temperature (commercial) — 0C to +70C
Architecture — Multiple Array MatriX (MAX) - third generation

Datasheets & Resources

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