EPM9560RC240-15N vs EPM9560RC240-10 Comparison

Detailed side-by-side comparison of EPM9560RC240-15N by Altera and EPM9560RC240-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RC240-15N EPM9560RC240-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status NRND Obsolete
Series MAX 9000 —
Family MAX 9000 (third-generation Multiple Array MatriX) MAX 9000
Usable Gates 12,000 12,000 gates
Macrocells 560 —
Logic Array Blocks (LABs) 35 12
Maximum User I/O Pins 216 —
Pin-to-Pin Propagation Delay (tPD) 15 ns —
Internal Counter Frequency (fCNT) 145 MHz —
Global Setup Time (tFSU) [DATA_NEEDED: tFSU for -15 grade] —
Clock-to-Output Time (tFCO) [DATA_NEEDED: tFCO for -15 grade] —
Supply Voltage 5.0 V 5 V
Logic Family CMOS (EEPROM-based) —
Programmability In-system programmable (IEEE 1532/JTAG) —
Boundary-Scan Test JTAG (IEEE 1149.1) —
Operating Temperature 0C to +70C (Commercial) 0C to +70C (commercial)
Package RQFP-240 (240-pin Plastic Quad Flat Pack) 240-pin RQFP (PowerQuad)
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: RoHS compliance - older Altera RQFP part] ROHS3 Compliant
Device Type — Complex Programmable Logic Device (CPLD)
Macro Cells — 560
Maximum System Frequency — 144.9 MHz
Pin-to-Pin Propagation Delay — 10 ns
Technology — CMOS EEPROM
User I/O Pins — 192
Moisture Sensitivity Level (MSL) — 3 (168 Hours)
Configuration Memory — Non-volatile EEPROM (instant-on)
Manufacturer Standard Lead Time — 1-7 Days (distributor stock)

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