EPM9560RC240-15W vs EPM9560RC240-10N Comparison
Detailed side-by-side comparison of EPM9560RC240-15W by Altera and EPM9560RC240-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RC240-10N - MAX 9000 CPLD 560 Macrocells 5V 240-Pin RQFP | Intel
EPM9560RC240-10N ⚠ Last Time BuySpecification Comparison
| Parameter | EPM9560RC240-15W | EPM9560RC240-10N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last Time Buy |
| Family | MAX 9000 | MAX 9000 |
| Device Type | Complex Programmable Logic Device (CPLD) | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| User I/O Pins | 191 | — |
| Pin-to-Pin Delay | 15 ns | — |
| Internal Frequency | 117.6 MHz | — |
| Supply Voltage | 4.75 V to 5.25 V | 5.0 V |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (ISP via JTAG) | — |
| Package | 240-pin RQFP (PowerQuad) with exposed pad | 240-pin RQFP (Plastic Quad Flat Pack) |
| Mounting Type | Surface Mount | — |
| Operating Temperature | 0C to +70C (commercial) | — |
| Logic Family | CMOS | — |
| Number of Pins | 240 | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | ROHS3 Compliant (per fpgalink.com listing) |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| Architecture | — | Multiple Array MatriX (MAX) - 3rd generation |
| Logic Array Blocks (LABs) | — | 16 |
| User I/Os | — | 212 |
| Internal Operating Frequency | — | 144.9 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 10 ns (-10 speed grade) |
| Process Technology | — | 0.65 µm CMOS EEPROM |
| Programming Interface | — | JTAG (IEEE 1149.1) - in-system programmable |
| I/O Standards Supported | — | 5.0 V TTL/CMOS, 3.3 V PCI-compatible |
| Operating Temperature (Commercial) | — | 0 °C to +70 °C |
| Lead-Free Finish (N suffix) | — | Yes (Pb-free) |
| Moisture Sensitivity Level (MSL) | — | 3 (168 hours) |