EPM9560RC304-10 vs EPM9560RC304-15N Comparison
Detailed side-by-side comparison of EPM9560RC304-10 by Intel and EPM9560RC304-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC304-10 | EPM9560RC304-15N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD / EPLD | — |
| Macrocells | 560 | 560 |
| Usable Gates | 16000 | 12,000 |
| Logic Elements | 560 | — |
| Package | RQFP-304 (RC) | RQFP-304 |
| Pin Count | 304 | — |
| Pin-to-Pin Propagation Delay | 12 ns | 15 ns (-15 speed grade) |
| Speed Grade | -10 | — |
| Supply Voltage | 5 V | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | — |
| User I/O Pins | 304 (package-limited) | — |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| Programming Method | JTAG in-system (ISP) | — |
| Process Technology | 0.65 µm CMOS EEPROM | High-performance CMOS EEPROM |
| Mounting Type | Surface Mount | — |
| MSL Level | 3 (168 Hours) | — |
| RoHS Status | ROHS3 Compliant | Compliant (lead-free per suffix N marking) |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Architecture | — | Multiple Array MatriX (MAX) - 3rd generation |
| Logic Array Blocks (LABs) | — | 16 (estimated from 560 macrocells) |
| Maximum Operating Frequency (fMAX) | — | 117.6 MHz |
| Supply Voltage (VCCINT) | — | 5 V |
| User I/O Count | — | 304 (package-level) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Operating Temperature Grade | — | Commercial (suffix N) |