EPM9560RI240-15N vs EPM9560RI240-20N Comparison

Detailed side-by-side comparison of EPM9560RI240-15N by Intel and EPM9560RI240-20N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPM9560RI240-20N EPM9560RI240-20N - MAX 9000 CPLD, 560 Macro, 191 I/O | Intel

EPM9560RI240-20N - MAX 9000 CPLD, 560 Macro, 191 I/O | Intel

EPM9560RI240-20N ⚠ Last Time Buy

Specification Comparison

Parameter EPM9560RI240-15N EPM9560RI240-20N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last Time Buy
Device Type EEPROM-based Complex Programmable Logic Device (CPLD) —
Logic Family MAX 9000 (Multiple Array MatriX) CMOS
Macrocells 560 560
Flip-Flops 772 —
Usable Gates 12,000 —
User I/O Pins 216 —
Package 240-pin RQFP (PowerQuad Flat Pack) 240-pin Power-enhanced BGA (RI240)
Pin-to-Pin Propagation Delay 15 ns —
Internal Frequency 145 MHz —
Supply Voltage 5.0 V —
I/O Voltage Compatibility 3.3 V or 5.0 V configurable —
Configuration Memory EEPROM (non-volatile, in-system programmable) —
JTAG Interface IEEE 1149.1 (JTAG) boundary scan —
Operating Temperature Range -40 C to +85 C (industrial) —
Mounting Type Surface Mount —
RoHS Status RoHS3 Compliant [DATA_NEEDED: RoHS compliance]
Moisture Sensitivity Level MSL 3 (168 hours) —
Manufacturer Standard Lead Time 1-7 days (distributor stock) —
Family — MAX 9000
Architecture — Multiple Array MatriX (MAX) - third generation
Logic Array Blocks (LABs) — 12
User I/Os — 191
Maximum Internal Frequency — 145 MHz
Pin-to-Pin Propagation Delay (tPD) — 11.4 ns
Process Technology — CMOS EEPROM
Programmability — In-system programmable (ISP) via JTAG (IEEE 1149.1)
Core Supply Voltage — 5.0 V
MultiVolt I/O — 5.0 V / 3.3 V compatible
Operating Temperature — 0C to +70C (commercial)
Programming Language Support — AHDL, VHDL, Verilog HDL
Development Tools — MAX+PLUS II, Quartus II

Datasheets & Resources

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