LC4064V-5T44C vs LC4064B-5T44C Comparison
Detailed side-by-side comparison of LC4064V-5T44C by Lattice Semiconductor and LC4064B-5T44C by Lattice Semiconductor. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Lattice Semiconductor
LC4064B-5T44C - 64-Macro 5ns ISP CPLD | Lattice Semiconductor
LC4064B-5T44C NrndSpecification Comparison
| Parameter | LC4064V-5T44C | LC4064B-5T44C |
|---|---|---|
| Brand | Lattice Semiconductor | Lattice Semiconductor |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Unknown | NRND |
| Device Type | Complex Programmable Logic Device (CPLD) | Complex programmable logic device (CPLD) |
| Product Family | ispMACH 4000V series | — |
| Macrocells | 64 macrocells | — |
| Propagation Delay | 5 ns | — |
| Logic Array Blocks | 4 logic array blocks | — |
| User I/O Pins | 30 user I/O pins | — |
| Internal Supply Voltage | 3 V to 3.6 V | — |
| Programming Supply Options | 3.3 V, 2.5 V, or 1.8 V | — |
| Programming Method | In-system programmable | — |
| Package | 44-TQFP, 10 x 10 mm | 44-pin TQFP |
| Mounting Type | Surface mount | Surface mount |
| Lead Pitch | [DATA_NEEDED: TQFP lead pitch] | — |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Maximum Clock Frequency | [DATA_NEEDED: maximum clock frequency] | [DATA_NEEDED: maximum clock frequency] |
| Configuration Memory Type | [DATA_NEEDED: configuration memory type] | [DATA_NEEDED: configuration memory type] |
| I/O Standards | [DATA_NEEDED: supported I/O standards] | — |
| Supply Current | [DATA_NEEDED: typical and maximum supply current] | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | [DATA_NEEDED: AEC-Q100 qualification status] |
| Lifecycle Status | [DATA_NEEDED: lifecycle status] | — |
| Series | — | ispMACH 4000B SuperFAST high-density PLD |
| Logic Macro Count | — | 64 macro cells |
| Speed Grade | — | 5 ns |
| Programming | — | In-system programmable |
| Supported Supply Levels | — | 3.3 V, 2.5 V, and 1.8 V |
| Number of I/O Pins | — | [DATA_NEEDED: number of I/O pins] |
| Internal Registers | — | [DATA_NEEDED: internal register count] |
| Programmable I/O Standards | — | [DATA_NEEDED: programmable I/O standards] |
| Input Voltage Tolerance | — | [DATA_NEEDED: input voltage tolerance] |
| Output Drive Current | — | [DATA_NEEDED: output drive current] |