LFE2-12E-6Q208I vs LFE2-12E-5Q208C Comparison
Detailed side-by-side comparison of LFE2-12E-6Q208I by Lattice Semiconductor and LFE2-12E-5Q208C by Lattice Semiconductor. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Lattice Semiconductor
LFE2-12E-6Q208I - 12K LUT ECP2 FPGA | Lattice Semiconductor
LFE2-12E-6Q208I ✓ ActiveSpecification Comparison
| Parameter | LFE2-12E-6Q208I | LFE2-12E-5Q208C |
|---|---|---|
| Brand | Lattice Semiconductor | Lattice Semiconductor |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Device Type | ECP2 field-programmable gate array (FPGA) | ECP2 Field Programmable Gate Array (FPGA) |
| Logic Lookup Tables | 12,000 LUTs | — |
| Embedded Logic Cells | 226,304 logic cells | — |
| User I/O | 131 I/Os | — |
| DSP Blocks | 1 DSP block | — |
| Core Supply Voltage | 1.2 V | 1.2 V |
| Speed Grade | -6 | -5 |
| Maximum Timing Frequency | 357 MHz | — |
| Package | 208-pin BFQFP (PQFP-208) | 208-BFQFP / PQFP-208 |
| Package Body Size | 28 mm x 28 mm | — |
| Mounting Type | Surface mount | Surface Mount |
| Temperature Grade | Industrial | — |
| Programmable Logic Technology | SRAM-based configuration | — |
| Lead-Free Status | Lead free | — |
| Configuration Interface | [DATA_NEEDED: configuration interface types] | — |
| Number of Dedicated Block RAM | [DATA_NEEDED: block RAM count] | — |
| Block RAM Capacity | [DATA_NEEDED: block RAM capacity] | — |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| Maximum I/O Frequency | [DATA_NEEDED: maximum I/O frequency] | — |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | — |
| RoHS Compliance | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| REACH Compliance | [DATA_NEEDED: REACH compliance status] | [DATA_NEEDED: REACH compliance status] |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification status] | — |
| Logic Elements | — | 12,000 cells |
| Logic Array Blocks | — | 1,500 LABs |
| LUT Capacity | — | 12K LUTs |
| User I/O Pins | — | 131 |
| Total RAM | — | 226,304 bits |
| Maximum Clock Frequency | — | 311 MHz |
| Core Supply Range | — | 1.14 V to 1.26 V |
| Process Technology | — | 90 nm CMOS |
| Package Dimensions | — | 28 mm x 28 mm |
| Number of Pins | — | 208 |
| Package Material | — | Lead-free plastic |
| Temperature Rating | — | [DATA_NEEDED: temperature grade] |
| FPGA Configuration Memory | — | [DATA_NEEDED: configuration memory type and capacity] |