LFE2-6E-6TN144I vs LFE2-6E-6T144I Comparison

Detailed side-by-side comparison of LFE2-6E-6TN144I by Lattice Semiconductor and LFE2-6E-6T144I by Lattice Semiconductor. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Lattice Semiconductor
LFE2-6E-6TN144I LFE2-6E-6TN144I - 6K LUT ECP2 FPGA | Lattice

LFE2-6E-6TN144I - 6K LUT ECP2 FPGA | Lattice

LFE2-6E-6TN144I ✓ Active
Lattice Semiconductor
LFE2-6E-6T144I LFE2-6E-6T144I - 6K LUT FPGA, 90 I/O, 1.2 V | Lattice

LFE2-6E-6T144I - 6K LUT FPGA, 90 I/O, 1.2 V | Lattice

LFE2-6E-6T144I ✓ Active

Specification Comparison

Parameter LFE2-6E-6TN144I LFE2-6E-6T144I
Brand Lattice Semiconductor Lattice Semiconductor
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Device Type ECP2 Field-Programmable Gate Array (FPGA) ECP2 Field Programmable Gate Array (FPGA) IC
Logic Cells 6,000 cells —
Equivalent LUT Capacity 6,000 LUTs —
User I/O Count 90 I/O —
Core Supply Voltage 1.2 V —
Speed Grade -6 -6
Maximum Clock Frequency 357 MHz —
Process Technology 90 nm —
Package 144-pin LQFP 144-LQFP
Package Body Size 20 mm x 20 mm —
Mounting Type Surface mount Surface Mount
Shipping Package Tray —
Temperature Grade Industrial temperature —
Lead-Free Status Lead free [DATA_NEEDED: lead-free status]
DSP Resources Present —
Block RAM [DATA_NEEDED: block RAM quantity] —
Operating Temperature Range [DATA_NEEDED: operating temperature range] —
Configuration Memory [DATA_NEEDED: configuration memory size] —
RoHS Compliance [DATA_NEEDED: RoHS compliance status] —
REACH Compliance [DATA_NEEDED: REACH compliance status] —
Logic Elements — 6,000 logic cells
Logic Array Blocks — 750 LABs/CLBs
User I/O — 90 I/O
Embedded RAM — 56,320 RAM bits
DSP Capability — DSP supported
Nominal Supply Voltage — 1.2 V
Operating Supply Voltage Range — 1.14 V to 1.26 V
Temperature Designator — I
Operating Junction Temperature — -40 °C to [DATA_NEEDED: upper operating junction temperature]
Package Size — 20 mm x 20 mm
Logic Resources — 6000-cell FPGA
Configuration Method — [DATA_NEEDED: configuration interface and programming mode]
I/O Standard Support — [DATA_NEEDED: supported I/O standards]
RoHS Status — [DATA_NEEDED: RoHS status]

Datasheets & Resources

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