LPC1812JBD144E vs LPC1813JBD144E Comparison
Detailed side-by-side comparison of LPC1812JBD144E by NXP Semiconductors and LPC1813JBD144E by NXP Semiconductors. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
NXP Semiconductors
LPC1812JBD144E - 180MHz Cortex-M3 512KB Flash MCU 104KB SRAM LQFP-144 | NXP
LPC1812JBD144E ✓ ActiveSpecification Comparison
| Parameter | LPC1812JBD144E | LPC1813JBD144E |
|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors |
| Category | Microcontrollers | Microcontrollers |
| Lifecycle Status | Active | Active |
| Core | ARM Cortex-M3 (32-bit) | — |
| Maximum CPU Frequency | 180 MHz | 180 MHz |
| Flash Memory Size | 512 KB (512K x 8) | — |
| SRAM Size | 104 KB | — |
| Supply Voltage Range | 2.2 V to 3.6 V | [DATA_NEEDED: supply voltage range] |
| Package | LQFP-144, 20 x 20 mm | 144-LQFP |
| Lead Count | 144 pins | — |
| Mounting Type | Surface Mount | Surface mount |
| Program Memory Type | Flash | — |
| Product Type | ARM Microcontrollers - MCU | 32-bit ARM Cortex-M3 microcontroller |
| Core Family | ARM Cortex-M3 | — |
| Operating Temperature | [DATA_NEEDED: operating temperature grade of JBD144E suffix] | — |
| Number of I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| Ethernet MAC | [DATA_NEEDED: Ethernet MAC presence and configuration] | — |
| USB Interface | [DATA_NEEDED: USB host/device configuration] | — |
| ADC Resolution | [DATA_NEEDED: ADC resolution and channel count] | — |
| Timer / PWM Channels | [DATA_NEEDED: timer and PWM channel count] | — |
| Debug Interface | [DATA_NEEDED: JTAG / SWD debug support detail] | — |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS status] |
| Qualification | [DATA_NEEDED: automotive or industrial qualification status] | — |
| Manufacturer | — | NXP Semiconductors |
| CPU Core | — | ARM Cortex-M3 |
| CPU Architecture | — | 32-bit |
| Pipeline Stages | — | 3 stages |
| Embedded Flash Memory | — | 512 KB |
| Flash Memory Organization | — | 512K x 8 bits |
| SRAM | — | 104 KB |
| Package Dimensions | — | 20 mm x 20 mm |
| Pin Count | — | 144 pins |
| Low-Power Capability | — | 1 low-power-consumption operating feature |
| Debug Capability | — | 1 enhanced debug feature |
| Operating Temperature Range | — | [DATA_NEEDED: operating temperature range] |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |