MC68882RC16A vs MC68882EI16AR Comparison
Detailed side-by-side comparison of MC68882RC16A by NXP Semiconductors and MC68882EI16AR by NXP Semiconductors. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
NXP Semiconductors
MC68882RC16A - 16 MHz 68882 FPU Co-Processor | NXP/Motorola
MC68882RC16A ObsoleteSpecification Comparison
| Parameter | MC68882RC16A | MC68882EI16AR |
|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors |
| Category | DSP | Specialized ICs |
| Lifecycle Status | Obsolete | NRND |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $48.50 | $37.75 |
| Device Type | Floating-Point Co-Processor (FPU) | — |
| Host CPU Family | Motorola 68020, 68030 | — |
| Core Architecture | HCMOS Enhanced | — |
| Clock Frequency (Rated) | 16 MHz | — |
| Peak Floating-Point Throughput | 46 MIPS equivalent | — |
| Floating-Point Formats | IEEE 754 single, double, extended (80-bit) | — |
| Floating-Point Registers | 8 x 80-bit | — |
| Transcendental Functions | Hardware sin, cos, tan, log, exp, sqrt | — |
| Supply Voltage | 5.0 V (single supply) | 5 V +/- 5 % |
| Operating Temperature | [DATA_NEEDED: operating temperature grade] | -40C to +85C (industrial grade, 'EI' suffix) |
| Package | PGA-68 (26.92 x 26.92 mm) | 68-pin PLCC (24.21 mm x 24.21 mm) |
| Mounting Type | Through-Hole (Pin Grid Array) | Surface Mount |
| Coprocessor Interface | Motorola Co-Processor Interface (MCPC) | — |
| Pin/Package Family | PGA-68 ceramic/CPGA | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Process Technology | HCMOS III, ~0.8 um feature size | HCMOS |
| Part Type | — | Floating-Point Co-Processor (FPU) |
| Manufacturer | — | NXP Semiconductors (formerly Motorola/Freescale) |
| Architecture / Family | — | M68000 Co-Processor (pairs with MC68020/MC68030) |
| Clock Frequency | — | 16 MHz |
| Floating-Point Standard | — | IEEE 754-1985 (single, double, extended 80-bit) |
| Data Registers | — | 8 x 80-bit floating-point data registers |
| Instruction Set | — | F-line M68000 co-processor interface |
| Operating Modes | — | 4 IEEE rounding modes; denormalized numbers; full exception handling |
| MSL Level | — | [DATA_NEEDED: MSL level] |
| Lead-Free | — | [DATA_NEEDED: lead-free] |
| Speed Grade Suffix | — | I = 16 MHz |
| Temperature Grade | — | E = -40C to +85C industrial |
| Packaging Suffix | — | AR = Tape and Reel, 68-pin PLCC |