MPC8536EAVTAULA557 vs MPC8536EAVTANG Comparison
Detailed side-by-side comparison of MPC8536EAVTAULA557 by NXP Semiconductors and MPC8536EAVTANG by NXP Semiconductors. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
NXP Semiconductors
MPC8536EAVTAULA557 - PowerQUICC III e500 MPU, 1.333GHz, FCPBGA-783 | NXP
MPC8536EAVTAULA557 ✓ Active
Specification Comparison
| Parameter | MPC8536EAVTAULA557 | MPC8536EAVTANG |
|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors |
| Category | Microcontrollers | Microcontrollers |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $2.05 | $85.40 |
| Core Architecture | PowerPC e500 | PowerPC e500 |
| Family | PowerQUICC III (MPC85xx) | — |
| Number of Cores | 1 | 1 |
| Data Width | 32-bit | — |
| Maximum Core Frequency | 1.333 GHz | 800 MHz |
| L1 Instruction Cache | 32 KB | — |
| L1 Data Cache | 32 KB | — |
| L2 Cache | 256 KB | Integrated |
| Package | 783-FCPBGA (29 mm x 29 mm) | 783-FCBGA (FC-PBGA) 29x29 mm |
| Mounting Type | Surface Mount | Surface Mount |
| Memory Controller | DDR2 with ECC support | DDR2 SDRAM with ECC |
| Ethernet MACs | Dual 10/100/1 GbE | — |
| PCI Express | PCIe x4 | x4 |
| Security Engine | SEC 3.0 (AES, 3DES, SHA, MD5) | IPSec, Kasumi, SNOW 3G acceleration |
| DMA Channels | 4 | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0C to +105C (Tj) |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Data Bus Width | — | 32-bit |
| Process Technology | — | 90 nm CMOS |
| L1 Cache | — | 32 KB I-cache + 32 KB D-cache |
| Ethernet | — | 2x 10/100/1000 Mbps eTSEC |
| Local Bus | — | 32-bit (16-bit muxed mode also supported) |
| Supply Voltage | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (per datasheet) |
| Series | — | PowerQUICC III (MPC85xx) |