RTAX250SL-1CG624E vs RTAX250SL-CG624B Comparison

Detailed side-by-side comparison of RTAX250SL-1CG624E by Microchip Technology and RTAX250SL-CG624B by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Microchip Technology
RTAX250SL-1CG624E RTAX250SL-1CG624E - 250K Gate Rad-Tolerant FPGA, CCGA-624 | Microchip

RTAX250SL-1CG624E - 250K Gate Rad-Tolerant FPGA, CCGA-624 | Microchip

RTAX250SL-1CG624E ✓ Active
Microchip Technology
RTAX250SL-CG624B RTAX250SL-CG624B - 250K Rad-Tolerant FPGA 624-CCGA | Microchip

RTAX250SL-CG624B - 250K Rad-Tolerant FPGA 624-CCGA | Microchip

RTAX250SL-CG624B ✓ Active

Specification Comparison

Parameter RTAX250SL-1CG624E RTAX250SL-CG624B
Brand Microchip Technology Microchip Technology
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $1.00 $3,950.00
Equivalent System Gates 250,000 gates 250000 gates
Configurable Logic Blocks (CLBs) 2816 —
Logic Cells 4224 —
User I/O 248 inputs / 248 outputs —
Core Supply Voltage 1.5 V (1.425 V to 1.575 V) 1.5 V
Maximum Combinatorial Delay (CLB) 0.93 ns —
Maximum System Frequency 649 MHz —
Process Technology 0.15 um CMOS 0.15 um antifuse
Logic Family CMOS —
Package 624-ball Ceramic Column Grid Array (CCGA-624) 624-ball CCGA (CG624)
Operating Temperature -55C to +125C —
Radiation Tolerance SEU-immune to specified LET threshold; SEU rate < 10-10 errors/bit-day Radiation-tolerant (space-flight grade)
SEU Mitigation SEU-hardened registers (no external TMR required) —
Embedded Memory Embedded SRAM with built-in FIFO control logic Embedded SRAM with FIFO control logic
Configuration Live-at-power-up, true single-chip operation —
Mounting Type Surface Mount (ceramic column grid array) Surface Mount
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
I/O Supply Voltage [DATA_NEEDED: I/O bank voltage] [DATA_NEEDED: I/O supply voltage]
Family — RTAX-SL (Radiation-Tolerant FPGA)
Logic Cells / CLBs — 2816 cells
Maximum Clock Frequency — 649 MHz
Combinatorial Delay (CLB) — 0.930 ns max
Configuration Technology — Antifuse (single-chip, live at power-up)
Programmability Type — Field Programmable Gate Array (one-time programmable)
Operating Temperature Range — [DATA_NEEDED: operating temperature range]
Number of User I/Os (CG624) — [DATA_NEEDED: number of user I/Os]

Datasheets & Resources

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