RTAX4000D-CQ352B vs RTAX4000DL-CQ352B Comparison

Detailed side-by-side comparison of RTAX4000D-CQ352B by Microchip Technology and RTAX4000DL-CQ352B by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Microchip Technology
RTAX4000D-CQ352B RTAX4000D-CQ352B - 4M-Gate Rad-Tolerant FPGA CQFP-352 | Microchip

RTAX4000D-CQ352B - 4M-Gate Rad-Tolerant FPGA CQFP-352 | Microchip

RTAX4000D-CQ352B ✓ Active
Microchip Technology
RTAX4000DL-CQ352B RTAX4000DL-CQ352B - 4M-Gate Rad-Tolerant FPGA | Microchip

RTAX4000DL-CQ352B - 4M-Gate Rad-Tolerant FPGA | Microchip

RTAX4000DL-CQ352B ✓ Active

Specification Comparison

Parameter RTAX4000D-CQ352B RTAX4000DL-CQ352B
Brand Microchip Technology Microchip Technology
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $6,900.00
Logic Cells 55,440 55,440
Configurable Logic Blocks (CLBs) 36,960 —
Equivalent Gates 4,000,000 —
System Gates (cells, per Jotrin listing) 33,600 —
Family RTAX-DSP (RTAX-S/SL/DSP) RTAX-DSP radiation-tolerant FPGA
Process Technology 0.15 um 0.15 um CMOS
Core Supply Voltage 1.5 V (1.425 V to 1.575 V) 1.5 V
Combinatorial CLB Delay [DATA_NEEDED: combinatorial CLB delay for standard speed grade; 0.99 ns max is specified for the -1 speed grade variant] —
Technology Type Antifuse, one-time programmable, radiation-tolerant —
Package 352-pin Ceramic CQFP (CQFP-352) 352-terminal CQFP (CQ352), ceramic metal-sealed cofired flatpack
Mounting Type Surface Mount Surface Mount
Configuration Live at power-up, single chip, no external configuration memory —
Radiation Tolerance Radiation-tolerant (space-flight qualified family) —
Application Domain Space flight systems —
Programmability OTP (one-time programmable antifuse) —
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Operating Temperature [DATA_NEEDED: operating temperature range] -55C to +125C
Equivalent System Gates — 4,000,000 gates
CLB Count — 36,960 CLBs
User I/O — 166 inputs / 166 outputs
Package Dimensions — 48 mm x 48 mm
Package JESD-30 Code — S-CQFP with guard ring
Program Type — One-time programmable antifuse
Embedded Memory — Embedded SRAM with FIFO control logic
DSP Blocks — Yes (DL = DSP-enabled variant)
Power-Up Operation — Live at power-up (single chip)
I/O Supply Voltage — [DATA_NEEDED: I/O voltage]

Datasheets & Resources

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