SAK-TC233LP-32F200N vs TMS320F28075PTPT Comparison
Detailed side-by-side comparison of SAK-TC233LP-32F200N by Infineon and TMS320F28075PTPT by Texas Instruments. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Infineon
SAK-TC233LP-32F200N - 32-bit AURIX TC2 MCU, 200MHz, 2MB | Infineon
SAK-TC233LP-32F200N ✓ ActiveTexas Instruments
TMS320F28075PTPT - C2000 32-bit MCU, 120MHz, 512KB Flash, 176-HLQFP | Texas Instruments
TMS320F28075PTPT ✓ ActiveSpecification Comparison
| Parameter | SAK-TC233LP-32F200N | TMS320F28075PTPT |
|---|---|---|
| Brand | Infineon | Texas Instruments |
| Category | Microcontrollers | Microcontrollers |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.35 | $10.37 |
| Series | AURIX TC2 - TC23xL | — |
| Core | TriCore v1.6.1 (32-bit, single-core) | — |
| CPU Family | AURIX TC2xx | — |
| Maximum Clock Frequency | 200 MHz | — |
| Program Memory (Flash) | 2 MB | — |
| RAM (SRAM) | [DATA_NEEDED: SRAM size in KB] KB | — |
| Operating Voltage Range | [DATA_NEEDED: V_core / V_ext supply range] V | — |
| Package | PG-TQFP-100-23 (TQFP-100, 14x14 mm) | 176-HLQFP (PTP) powerPAD, 24x24 mm |
| Pin Count | 100 | 176 |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Range | [DATA_NEEDED: AEC-Q100 Grade / -40C to +150C grade] C | -40C to +105C |
| CAN-FD Nodes | Yes (M_CAN) | — |
| Hardware Security Module (HSM) | [DATA_NEEDED: HSM presence on LP variant] | — |
| Functional Safety (ISO 26262) | ASIL-B capable; LP-suffix variants support split-lock ASIL-D on selected functions | — |
| Flash Endurance | [DATA_NEEDED: program/erase cycles] cycles | — |
| Data Retention | [DATA_NEEDED: years] years | — |
| RoHS Status | Compliant | Compliant |
| MSL Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Lead Free | Yes | — |
| Core Architecture | — | C28x 32-bit DSP/MCU |
| CPU Clock Speed | — | 120 MHz |
| Math Acceleration | — | FPU + TMU |
| Co-processor | — | CLA (Control Law Accelerator) |
| Program Flash | — | 512 KB (256K x 16) |
| RAM | — | [DATA_NEEDED: SRAM size] |
| Operating Voltage - Core | — | 1.2 V |
| Operating Voltage - I/O | — | 3.3 V |
| ADC Subsystem | — | [DATA_NEEDED: ADC channels/bits] |
| PWM Channels | — | [DATA_NEEDED: PWM channel count] |
| Sigma-Delta Filter (SDFM) | — | Yes (integrated) |
| Configurable Logic Block (CLB) | — | Yes |
| Functional Safety | — | FuSa-capable (IEC 61508/ISO 26262 docs available) |
| Communication Interfaces | — | CAN 2.0B, SPI, I2C, UART, LIN |