STM32F030K6T6TR vs STM32G031C6T6 Comparison
Detailed side-by-side comparison of STM32F030K6T6TR by STMicroelectronics and STM32G031C6T6 by STMicroelectronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
STMicroelectronics
STM32F030K6T6TR - 48MHz Cortex-M0 32KB MCU | STMicroelectronics (Tape & Reel)
STM32F030K6T6TR ✓ ActiveSTMicroelectronics
STM32G031C6T6 - 64MHz Cortex-M0+ 32KB MCU | STMicroelectronics
STM32G031C6T6 ✓ ActiveSpecification Comparison
| Parameter | STM32F030K6T6TR | STM32G031C6T6 |
|---|---|---|
| Brand | STMicroelectronics | STMicroelectronics |
| Category | Microcontrollers | Microcontrollers |
| Lifecycle Status | Active | Active |
| Product Type | 32-bit Arm Cortex-M0 microcontroller | 32-bit microcontroller |
| Maximum CPU Frequency | 48 MHz | 64 MHz |
| Flash Memory | 32 KB | 32 KB |
| SRAM | 4 KB | 8 KB |
| Operating Voltage Range | 2.4 V to 3.6 V | — |
| ADC Resolution | 12 bit | — |
| Core Architecture | Arm Cortex-M0 | 32-bit RISC |
| Architecture Type | 32-bit RISC | — |
| Package | 32-LQFP, 7 x 7 mm | 48-LQFP (7 x 7 mm) |
| Mounting Type | Surface mount | Surface mount |
| Communications Interfaces | Communication interfaces | — |
| Timers | Hardware timers | — |
| Reset Features | Power-on reset and power-down reset (POR/PDR) | — |
| Product Line | STM32F0 value line | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | [DATA_NEEDED: AEC-Q100 qualification status] |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | — |
| Pin Count | 32 pins | — |
| Processor Core | — | Arm Cortex-M0+ |
| Flash Organization | — | 32K x 8 |
| USART Interfaces | — | 2 |
| Product Series | — | STM32G0 series |
| Variant Group | — | STM32G031x4/x6/x8 |
| Supply Voltage | — | 2.5 V / 3.3 V |
| VCORE Architecture | — | Internal supply generated by an embedded linear voltage regulator |
| VREF+ Package Connection | — | Internally connected to VDD on packages without a VREF+ pin |
| Operating Temperature Range | — | [DATA_NEEDED: operating temperature range] |
| GPIO Count | — | [DATA_NEEDED: GPIO count] |