STM32H750VBT6 vs STM32H753AII6 Comparison

Detailed side-by-side comparison of STM32H750VBT6 by STMicroelectronics and STM32H753AII6 by STMicroelectronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter STM32H750VBT6 STM32H753AII6
Brand STMicroelectronics STMicroelectronics
Category Microcontrollers Microcontrollers
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $5.25 $11.80
Core Architecture Arm Cortex-M7 with double-precision FPU —
Maximum Clock Frequency 480 MHz 480 MHz
CoreMark Performance [DATA_NEEDED: CoreMark score] —
Program Flash Memory 128 KB —
SRAM 1 MB (256 KB DTCM + 256 KB AXI SRAM + 64 KB ITCM + 4 KB backup SRAM) —
Supply Voltage (VDD) 1.62 V to 3.6 V —
Operating Temperature -40 C to +85 C (grade 6) —
Package LQFP-100 (14x14 mm, 0.5 mm pitch) 169-ball UFBGA (7x7 mm)
GPIO Count [DATA_NEEDED: GPIO count] [DATA_NEEDED: GPIO count]
Communication Interfaces 46 (USART/UART, SPI, I2C, FDCAN, USB OTG FS+HS, Ethernet MAC, SDMMC, SAI) USB OTG, 2x SDMMC, 4x USART/UART, 6x SPI, 4x I2C, 2x CAN 2.0B, 2x SAI, Ethernet MAC
Display Controller TFT-LCD controller (LTDC) —
Camera Interface DCMI 8/14-bit parallel —
Cryptographic Accelerator AES/DES/3DES/HASH/SHA, true RNG —
Graphics Accelerator Chrom-ART (DMA2D) Chrom-ART Accelerator
Analog Peripherals [DATA_NEEDED: ADC/DAC channels] —
Mounting Type Surface Mount Surface Mount
MSL Level 3 [DATA_NEEDED: MSL Level]
RoHS Status Compliant (ROHS3) Compliant
Core — ARM Cortex-M7 with double-precision FPU + DSP
Program Memory Size — 2 MB Flash (dual-bank with ECC)
RAM Size — 1 MB SRAM (192 KB DTCM + 64 KB ITCM)
Supply Voltage Range — 1.62 V to 3.6 V
Operating Temperature Range — -40 C to +85 C
ADC — 3x 16-bit ADC, up to 3.6 MSPS
DAC — 2x 12-bit DAC
Timers — Multiple 16-/32-bit timers, HRTIM, low-power timers
Crypto/Hash — AES, Hash, True Random Number Generator (TRNG)

Datasheets & Resources

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