XC2C32A-4CPG56C vs XC2C32A-4CP56C Comparison
Detailed side-by-side comparison of XC2C32A-4CPG56C by AMD and XC2C32A-4CP56C by AMD. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | XC2C32A-4CPG56C | XC2C32A-4CP56C |
|---|---|---|
| Brand | AMD | AMD |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Device Type | CoolRunner-II complex programmable logic device | CoolRunner-II complex programmable logic device |
| Macrocells | 32 macrocells | 32 macrocells |
| Logic Gates | 750 gates | — |
| User I/O Count | 33 user I/Os | — |
| Internal Frequency | 200 MHz | 450 MHz |
| Propagation Delay | 4 ns | 3.8 ns |
| Minimum Pin-to-Pin Logic Delay | 3.8 ns | — |
| Process Technology | 0.18 µm CMOS | 0.18 µm CMOS |
| Supply Optimization | 1.8 V optimized | — |
| Quiescent Current | 12 µA | 12 µA minimum |
| Programmable Type | In-system programmable | — |
| Package Type | 56-pin CSP BGA | — |
| Package Dimensions | 6 × 6 mm | — |
| Ball Pitch | 0.50 mm | — |
| Total Pin Count | 56 pins | — |
| Logic Family | CMOS | CMOS |
| Mounting Type | Surface mount | — |
| Lead-Free Status | Lead free | Lead Free |
| RoHS Status | RoHS compliant | Compliant |
| Maximum Pin-to-Pin Logic Delay | — | 3.0 ns |
| User I/Os | — | 33 pins |
| Total Pins | — | 56 pins |
| Core Supply Voltage | — | 1.8 V |
| Package | — | 56-pin CSPBGA, 6 x 6 mm, 0.50 mm pitch |
| Terminal Type | — | Ball |
| Package Shape | — | Square |
| Temperature Grade | — | Commercial |
| Programming Interface | — | [DATA_NEEDED: programming interface details] |
| Operating Temperature Range | — | [DATA_NEEDED: operating temperature range] |