XC9572XL-7VQ64I vs XC9572XL-7VQ64C Comparison

Detailed side-by-side comparison of XC9572XL-7VQ64I by AMD and XC9572XL-7VQ64C by AMD. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

AMD
XC9572XL-7VQ64C XC9572XL-7VQ64C - 72-Macrocell 3.3V CPLD | AMD

XC9572XL-7VQ64C - 72-Macrocell 3.3V CPLD | AMD

XC9572XL-7VQ64C Obsolete

Specification Comparison

Parameter XC9572XL-7VQ64I XC9572XL-7VQ64C
Brand AMD AMD
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Obsolete
Family XC9500XL FastFLASH CPLD —
Supply Voltage 3.3 V 3.3 V
Macrocells 72 —
Usable Gates 1600 —
User I/O 52 —
Max Propagation Delay (tPD) 7.5 ns —
Speed Grade -7 -7
Package 64-TQFP (VQ64) 64-pin VQFP
Lead Pitch 0.5 mm —
Lead Finish Tin —
Program/Erase Cycles 10,000 minimum —
In-System Programming Yes (ISP) Supported
Boundary Scan IEEE Std 1149.1 (JTAG) IEEE boundary-scan support
Input Hysteresis Yes, all user and boundary-scan inputs Provided on user and boundary-scan inputs
Bus-Hold Circuitry Yes, all user pin inputs —
Hot-Plugging Supported —
Operating Temperature -40C to +85C (industrial, I suffix) —
Mounting Type Surface Mount —
RoHS Status [DATA_NEEDED: RoHS status] Compliant
Device Type — Complex Programmable Logic Device (CPLD)
Product Family — XC9500XL
Macrocell Count — 72 macrocells
Maximum Frequency — 125 MHz
Propagation Delay — 7.5 ns
Total Pin Count — 64 pins
User I/O Count — 52 I/Os
Individual Output Enable — Supported per output pin
Local Inversion — Supported
Bus Hold — Provided on user pin inputs
Hot-Plugging Capability — Supported
Operating Temperature Range — [DATA_NEEDED: operating temperature range]
Supply Current — [DATA_NEEDED: supply current]
I/O Voltage Range — [DATA_NEEDED: I/O voltage range]
Pin Configuration — [DATA_NEEDED: complete 64-pin configuration]

Datasheets & Resources

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