Microcontroladores

DSPIC33EP16GS504T-E/ML

dsPIC33EP16GS504T-E/ML - 16-Bit 60 MIPS DSC 16KB Flash QFN-44 | Microchip

The Microchip dsPIC33EP16GS504T-E/ML is a 16-bit digital signal controller (DSC) from the dsPIC33EP16GS504 family, delivering up to 60 MIPS performance with 16KB (16K x 8) of FLASH program memory, housed in a 44-pin QFN (8x8 mm, ML) surface-mount package. The device is qualified for automotive use (AEC-Q100) and supports Functional Safety (FuSa) development. A digital signal controller combines the compute capability of a 16-bit digital signal processor with the peripheral integration and control peripherals of a microcontroller, sitting in the product hierarchy between a general-purpose MCU and a dedicated DSP. In the digital power ecosystem, a DSC executes the control loops of switch-mode power supplies, replacing analog control ICs with programmable firmware while retaining hard real-time response. Key features of the dsPIC33EP GS family include dedicated high-speed PWM modules purpose-built for switch-mode power supply (SMPS) topologies, on-chip high-speed ADCs for current and voltage feedback sampling, DSP-engine multiply-accumulate instructions for digital control loop math, and internal fast RC oscillators. The GS50x sub-family is explicitly marketed by Microchip for digital power conversion such as AC-DC and DC-DC power supplies. The 60 MIPS core executes the control loop at switching frequencies typical of modern SMPS designs, while the dedicated PWM peripherals offer complementary, edge-aligned and center-aligned modes with dead-time insertion - critical for half-bridge, full-bridge and LLC converters. The 16KB FLASH supports compact, deterministic control firmware; the -40C to +125C extended temperature grade (E suffix) suits automotive and industrial environments. Typical applications include interleaved power factor correction (PFC), AC-DC power supplies, DC-DC converters, digital lighting ballasts, battery chargers and solar micro-inverters. Microchip publishes an interleaved PFC reference design for this family operating from universal input voltage up to 350W output. Design consideration: budget FLASH carefully - at 16KB, avoid linking large middleware stacks and prefer hand-optimized assembly or compiler-optimized control-loop routines; verify per-pin mapping against the 44-QFN datasheet pin diagrams before layout. This page synthesizes distributor pricing, same-brand drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

USD $2,55 En stock

dsPIC33EP512GM306-I/PT

dsPIC33EP512GM306-I/PT - 70 MIPS DSC, 512KB Flash, 64-TQFP | Microchip

The Microchip dsPIC33EP512GM306-I/PT is a 16-bit Digital Signal Controller (DSC) from the dsPIC33E family, delivering up to 70 MIPS through a 140 MHz dsPIC DSC core with integrated single-cycle MAC DSP engine, packaged in a 64-pin TQFP (10x10 mm) and supplied in 3.0 V to 3.6 V industrial-grade temperature range (-40C to +85C). It integrates 512 KB of Flash program memory, 48 KB of SRAM, and on-chip peripherals tuned for high-performance precision motor control, digital power conversion, and advanced sensor processing. A Digital Signal Controller (DSC) is a hybrid class of microcontroller that combines a deterministic MCU control pipeline with a hardware DSP multiply-accumulate (MAC) engine. In the taxonomy, a DSC sits between a microcontroller (MCU) and a digital signal processor (DSP); it executes control code C-friendly while accelerating math-heavy signal processing kernels such as Field Oriented Control (FOC), digital PID, and FFT. The dsPIC33EP 'GM' sub-family is specifically designed for motor control and digital power, integrating up to four op-amps, multiple PWMs with dead-time control, and high-speed 10/12-bit ADCs. Key features of the dsPIC33EP512GM306-I/PT include twelve PWM channels with flexible triggering, eight 16-bit timers, four on-chip op-amps for current sensing in motor feedback loops, two 12-bit ADCs with up to 16 simultaneous sample-and-hold channels reaching 3.25 MSPS, and dual comparators. The device also integrates a Charge Time Measurement Unit (CTMU) for touch and capacitive sensing, a 16-bit Peripheral Pin Select (PPS) I/O remapping engine, and multiple UART/SPI/I2C/CAN interfaces. Its 16-channel DMA controller offloads data movement for deterministic, low-latency control loops. Architecture is built on a 16-bit modified Harvard bus with separate program and data paths and a hardware DSP engine. With a 140 MHz CPU clock (70 MIPS), the MAC unit executes single-cycle 16x16-bit multiplies with 40-bit accumulator, ideal for high-bandwidth control loops in PMSM/BLDC drives and power conversion. The integrated op-amps and comparators form the feedback analog front-end, eliminating an external current-sense amplifier chain and improving noise immunity. Typical applications include field-oriented control of PMSM and BLDC motors (drone ESCs, EV traction, HVAC compressors), digital power stage control for AC/DC and DC/DC converters, solar micro-inverters, servo drives, industrial automation controllers, sensorless motor control using BEMF or shunt-based observers, and high-speed signal acquisition front-ends. Audio and ultrasonic sensing are also enabled by the dual-ADC simultaneous sampling and the DSP MAC. When designing with this device, allocate the 64-pin budget between motor power signals (PWM H/L pairs, gate-driver EN lines), analog feedback (current shunts, BEMF dividers routed through the on-chip op-amps), and communication (CAN, UART, I2C for sensors and host MCU). Decouple VDD/VSS pairs as documented in the family datasheet; route AVDD separately from DVDD to keep ADC noise below 1 LSB. A JTAG/ICSP header is recommended for in-circuit debugging using MPLAB X IDE. This page synthesizes distributor pricing, drop-in design options, and practical design notes not found in the manufacturer datasheet, helping engineers evaluate the dsPIC33EP512GM306-I/PT for next-generation motor-control and digital-power designs.

USD $7,18 En stock

DSPIC33EP512GP504-E/TL

dsPIC33EP512GP504-E/TL - 512KB 16-bit DSC 60MHz | Microchip

The Microchip Technology dsPIC33EP512GP504-E/TL is a 16-bit digital signal controller (DSC) with 512KB flash, 48KB RAM, a 60 MHz core, and a 44-pin VFTLA (TQFP-44) package with exposed pad, rated for -40C to +125C operation under AEC-Q100. A digital signal controller combines the computational architecture of a digital signal processor (DSP) with the peripheral set and ease of use of a microcontroller (MCU). DSCs occupy the mid-tier of the embedded processing hierarchy - above general-purpose microcontrollers in math throughput, below application processors - making them the standard choice for closed-loop motor control, digital power conversion, and sensor signal processing where deterministic interrupt latency and hardware multiply-accumulate (MAC) units matter. Key features of this part include the dsPIC33E 16-bit core running at up to 70 MIPS class performance with DSP instruction support, 512KB of self-programmable flash and 48KB of on-chip RAM, and an integrated analog suite: multiple on-chip operational amplifiers, comparators, a CTMU (Charge Time Measurement Unit), and a high-performance 10/12-bit ADC. Communication coverage is broad, with CAN 2.0B, multiple UARTs, SPI, and I2C interfaces, plus the Peripheral Trigger Generator (PTG) for autonomous peripheral sequencing. The high-speed PWM module with advanced analog integration positions the device squarely in digital power and motor-control designs, while the op amps reduce external component count in current-sense signal chains. Code density from the enhanced 16-bit architecture allows complex control loops to be written largely in C with assembly-level inner loops where needed. Typical applications include brushless DC (BLDC) and PMSM motor drives, digital SMPS and power-factor-correction converters, automotive body and powertrain auxiliary systems (leveraging the AEC-Q100 -E extended temperature grade), and industrial control nodes that need CAN connectivity plus on-chip analog. Design consideration: supply the core from the internal regulator using the required low-ESR VCAP capacitor per the Microchip datasheet, and budget the 3.3V I/O rail separately; the exposed pad on the VFTLA package should be soldered to a grounded copper pour for best thermal and EMC margins. This page synthesizes distributor inventory data, same-family drop-in alternatives, and practical design guidance beyond what the manufacturer product page provides.

USD $5,20 En stock

DSPIC33EP64GS505-E/PT

dsPIC33EP64GS505-E/PT - 16-bit 70 MIPS DSC 64KB Flash | Microchip

The Microchip Technology DSPIC33EP64GS505-E/PT is a 16-bit digital signal controller (DSC) delivering 70 MIPS performance with 64KB of Flash program memory, housed in a 48-pin TQFP (PT) package with exposed pad and extended temperature range of -40C to +125C. A digital signal controller combines the compute throughput of a digital signal processor (DSP) with the peripheral integration and deterministic control of a microcontroller (MCU). Within the power-management hierarchy, DSCs sit at the heart of digital switch-mode power supplies (SMPS), replacing analog control loops with firmware-based control for higher flexibility, programmability, and telemetry. The dsPIC33EP family occupies the 16-bit embedded control segment between general-purpose MCUs and 32-bit application processors. Key features of the GS50x family include an interconnected high-speed PWM module purpose-built for power conversion, high-speed analog-to-digital converters, on-chip digital-to-analog converters (DAC), programmable gain amplifiers (PGA), and analog comparators that close control loops without external components. According to Microchip, the dsPIC33EPXXGS50X family is explicitly targeted at digital power applications. Architecturally, the device uses the enhanced dsPIC33E core with DSP instruction support, allowing single-cycle MAC operations used in proportional-integral-derivative (PID) and compensator routines. The interconnected PWM, ADC, and comparator fabric enables loop latencies measured in nanoseconds, critical for peak-current-mode and multi-loop converters. Typical applications include AC-DC converters, power factor correction (PFC) stages, DC-DC converters, uninterruptible power supplies, solar micro-inverters, and lighting ballasts. The extended -40C to +125C operating range of the E-grade part suits industrial and automotive-adjacent environments. Design consideration: budget ADC sampling and PWM update timing so the control loop executes within one switching period; use the family reference design (Interleaved PFC, 350W) as a validated starting point. This page synthesizes distributor pricing, drop-in family alternatives, and practical design notes not found in the manufacturer datasheet.

USD $3,45 En stock

DSPIC33EP64GS505T-E/PT

dsPIC33EP64GS505T-E/PT - 16-bit 70 MIPS DSC 64KB Flash | Microchip

The Microchip Technology dsPIC33EP64GS505T-E/PT is a 16-bit digital signal controller (DSC) from the dsPIC33EP GS series for SMPS and digital power conversion, delivering up to 70 MIPS performance with 64KB (64K x 8) of Flash program memory, packaged in a 48-pin TQFP with exposed pad (7x7 mm), and qualified to AEC-Q100 for automotive use with an extended -40C to +125C operating range. A digital signal controller combines the compute throughput of a DSP with the peripheral integration and control architecture of a microcontroller. Within the power-management semiconductor hierarchy, a DSC sits between a general-purpose MCU and a dedicated power-conversion ASIC, providing real-time loop closure for switch-mode power supplies. The dsPIC33EPXXGS50X family is specifically architected for multi-loop digital SMPS topologies. Key differentiating features include high-speed PWM modules purpose-built for power conversion, high-speed analog-to-digital converters with an integrated programmable gain amplifier (PGA), on-chip comparators, and an interconnect fabric that ties the PWM, ADC and comparator blocks together for deterministic control-loop latency. The GS50x family also carries Functional Safety (FuSa) support documentation, enabling use in safety-conscious designs. Architecturally, the device is built on the 16-bit dsPIC33EP core with DSP instruction extensions (MAC, DSP multiply), executing from zero-wait-state Flash at full speed. The interconnected high-speed PWM supports complementary outputs, dead-time control and fault protection essential for AC-to-DC, DC-to-DC, power factor correction (PFC) and inverter stages. Typical applications include AC-DC power supplies, digital PFC stages, DC-DC converters, solar micro-inverters, LED drivers and battery chargers, where the combination of fast ADC sampling and high-resolution PWM directly improves loop bandwidth and efficiency. Design consideration: the exposed-pad TQFP requires a solid ground connection to the PCB thermal pad for both heat dissipation and analog ground integrity - do not leave the ePad floating. This page synthesizes distributor pricing, drop-in family alternatives, and practical design notes not found in the manufacturer datasheet, as of 2026-09-25.

USD $3,38 En stock

DSPIC33FJ32GS606-E/MR

dsPIC33FJ32GS606-E/MR - 16-bit DSC 40MIPS 32KB Flash | Microchip

The Microchip Technology dsPIC33FJ32GS606-E/MR is a 16-bit digital signal controller (DSC) delivering 40 MIPS performance, 32KB of Flash program memory, and 4KB of RAM, housed in a 64-pin VQFN (9x9 mm) package with exposed pad and an extended industrial temperature rating of -40C to +125C. A digital signal controller combines the deterministic control of a microcontroller (MCU) with the mathematical throughput of a digital signal processor (DSP) in a single core. In the power-management hierarchy, the dsPIC33FJ GS series sits at the application level of switch-mode power supply (SMPS) control: it closes current- and voltage-control loops that would otherwise require multiple analog ICs, making it a programmable power-conversion controller rather than a fixed-function chip. Key features include a high-speed PWM module purpose-built for power conversion, high-speed ADC and analog comparators for cycle-by-cycle current limiting, four DMA channels, eight timers, boundary-scan (JTAG) capability, a barrel shifter for fast DSP math, and dual serial I/O ports on a multiple internal bus architecture. These peripherals directly support multi-loop digital power topologies. Technically, the dsPIC RISC core executes most instructions in a single cycle at up to 40 MIPS from a 3.0V to 3.6V (3.3V nominal) supply. The dedicated PWM hardware supports complementary outputs, dead-time insertion, and fault protection, while the fast ADC can synchronize sampling to the PWM period, which is essential for stable average-current-mode control. An internal regulator requires a low-ESR capacitor of at least 22 uF, 16V on the VCAP pin, which must not be tied to VDD. Typical applications are AC-to-DC converters, DC-to-DC converters, power factor correction (PFC) stages including interleaved PFC reference designs up to 350W, uninterruptible power supplies (UPS), and solar inverters. For design, budget the VCAP capacitance and PCB copper area early: at 40 MIPS the core draws its full current continuously in power-conversion duty, and incorrect VCAP decoupling is a leading cause of brown-out resets in this family. This page adds value beyond the datasheet by consolidating distributor stock and pricing, same-package drop-in alternatives, and practical design notes for digital power designs in one place.

USD $4,42 En stock

eZ80F91AZ050SG

eZ80F91AZ050SG - 50MHz 8-bit 256KB Flash MCU | Zilog

The Zilog eZ80F91AZ050SG is an 8-bit microcontroller in the eZ80 Acclaim! family, delivering 50 MHz CPU performance with 256 KB of on-chip Flash and 16 KB SRAM in a 144-pin LQFP (20x20 mm) package. According to DigiKey listing 928880, the part integrates an EMAC (Ethernet Media Access Controller) for embedded networking and supports both Z80-compatible (64 KB) and full 24-bit (16 MB) addressing modes. An 8-bit microcontroller (MCU) is a single-chip processor whose internal data path is 8 bits wide, optimized for control-oriented tasks that demand deterministic behaviour, low cost, and minimal power. The eZ80 architecture extends the classic Z80 instruction set with a 24-bit linear address space, making it a bridge between legacy 8-bit code and 32-bit addressing. Within the IC taxonomy it sits at: microcontroller -> embedded processor -> integrated circuit. It belongs to the broader class of flash microcontrollers and is commonly deployed in industrial control and embedded communication designs. Key features include 32 general-purpose I/O pins, four 16-bit timers, a 10/100 Ethernet MAC with MII interface, two UARTs, I2C, SPI, IrDA encoder/decoder, and a JTAG debug port. The on-chip peripherals are designed for embedded internet connectivity, while the SRAM-backed Flash supports in-application programming for field upgrades. The eZ80F91AZ050SG uses a single-cycle pipelined core running at 50 MHz, providing sustained throughput equivalent to 80 MIPS peak (Z80 instructions). The integrated EMAC implements full IEEE 802.3 MAC and PHY interfacing, eliminating the need for an external Ethernet controller in point-of-sale and embedded gateway designs. Typical applications include industrial control, point-of-sale (POS) terminals, embedded communication gateways, security systems, and building automation. The wide address space makes the device attractive for legacy Z80 software migration and new 24-bit flat-memory designs. Design considerations include ensuring proper decoupling on the analog supply pins, following the recommended 50 MHz crystal layout, and reviewing Zilog application note PS0192 for EMAC magnetics and PHY interface. The device operates from a 3.3 V supply. This page consolidates verified distributor pricing, drop-in Zilog alternatives, and application guidance not collated in the standalone datasheet, providing an integrated reference for embedded engineers.

USD $10,85 En stock

i7-1370PRE

i7-1370PRE - 14C/20T Embedded Raptor Lake, 24MB Cache | Intel

The Intel Core i7-1370PRE is a 13th Generation Raptor Lake mobile/embedded processor featuring 14 cores (6 Performance + 8 Efficient), 20 threads, 24 MB Intel Smart Cache, and a maximum turbo frequency of 4.80 GHz, designed in the FC-BGA16F package. Built on Intel 7 process technology, it supports up to 96 GB DDR5/DDR4 memory and integrates Intel Iris Xe graphics (96 EU). The processor operates with a 28 W processor base power and targets embedded and industrial applications requiring long-life availability. An embedded processor is a CPU designed for use in industrial, in-vehicle, or IoT systems where long-term availability (typically 10+ years), extended temperature tolerance, and platform stability are critical. Embedded CPUs sit within the broader taxonomy: processor -> central processing unit (CPU) -> mobile/embedded CPU -> Raptor Lake family -> Intel Core i-series. The 'PRE' suffix in Intel's mobile roadmap specifically denotes an embedded SKU qualified for long-life cycles, distinct from mainstream consumer 'P' parts. Key specifications include 6 P-cores with hyper-threading up to 5.0 GHz peak and 8 E-cores up to 3.7 GHz, 24 MB L3 cache, 96 EU Iris Xe graphics at 1.50 GHz, and 28 W processor base power configurable down to 20 W. The FC-BGA16F socket (1744-ball FCBGA) provides platform integration. Memory support includes DDR5-5200, DDR4-3200, LPDDR5-6400, and LPDDR4x-4267 with ECC capability. Architecturally, the i7-1370PRE uses Intel's hybrid P-core/E-core design, where Performance cores handle single-threaded latency-critical work and Efficient cores process throughput-oriented background tasks via Intel Thread Director scheduling. The 10 nm Intel 7 process allows higher core counts within embedded thermal envelopes, and the integrated Iris Xe GPU enables display and light GPGPU workloads without a discrete GPU. Typical applications include industrial edge computing, in-vehicle infotainment, factory automation HMIs, medical imaging systems, and digital signage. The 'E' (embedded) qualification extends operating temperature support and supply longevity compared to standard 'P' siblings. When designing with this CPU, select motherboards and chipsets engineered for the FC-BGA16F socket rather than consumer LGA sockets, validate thermal design at the configured cTDP, and confirm chipset firmware supports the specific embedded SKU. ECC memory and Intel vPro features require compatible PCH selection. This page synthesizes distributor pricing, Intel ARK specifications, cross-reference alternatives, and PCB/socket design notes to support embedded system engineers selecting between long-life Intel SKUs and cross-generational replacements.

USD $365,00 En stock

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