製品 (39,000+)

MAX1420CCM+TD - 12-Bit 60MSPS 3.3V ADC | Maxim Integrated
MAX1420CCM+TD

MAX1420CCM+TD - 12-Bit 60MSPS 3.3V ADC | Maxim Integrated

The Maxim Integrated (Analog Devices) MAX1420CCM+TD is a 12-bit, 60Msps, +3.3V low-power analog-to-digital converter (ADC) with an internal reference, offered in a 48-pin TQFP (7 mm x 7 mm, 1.4 mm height) package and specified over the commercial 0°C to +70°C temperature range. It integrates a fully-differential input, a 12-stage pipelined ADC architecture, and a wideband track-and-hold (T/H) front-end that captures single-shot or IF-sampled baseband signals cleanly at full sampling rate. An ADC (analog-to-digital converter) is a data-conversion integrated circuit that transforms continuous analog voltages into discrete digital codes. Within the data-converter hierarchy, pipelined ADCs like the MAX1420 sit alongside successive-approximation (SAR) and flash converters as the dominant architecture for medium-to-high speed (1 MSPS to 250 MSPS) and 8-to-16-bit resolution requirements. ADCs are themselves a sub-category of data-conversion ICs, which together with DACs, sample-and-hold amplifiers, and references form the signal-chain building blocks inside mixed-signal and instrumentation systems. Key specifications of the MAX1420CCM+TD include a 60 MSPS sampling rate, 12-bit resolution, fully-differential analog input, internal precision reference, CMOS-compatible three-state parallel outputs with offset-binary coding, and a single 3.3V analog supply. The pipelined architecture and integrated T/H deliver low spurious content and consistent dynamic performance across the Nyquist band, while the internal reference removes the need for an external reference IC and simplifies board layout. Typical applications include IF/baseband sampling in communications receivers, medical imaging front ends, portable instrumentation, CCD/camera imaging pipelines, and ultrasound systems. In each of these, the combination of 60 MSPS throughput, 12-bit resolution, internal reference, and low-power 3.3V operation provides a compact data-conversion solution without external analog complexity. When designing with this part, observe the input common-mode biasing, drive the analog input in fully-differential fashion for best SFDR, and decouple AVDD/DRVDD with low-ESL ceramics placed within a few millimetres of the supply pins.

見積もり お問い合わせ
MAX1420ECM+T - 12-Bit 60MSPS +3.3V ADC | Maxim Integrated
MAX1420ECM+T

MAX1420ECM+T - 12-Bit 60MSPS +3.3V ADC | Maxim Integrated

The Analog Devices/Maxim Integrated MAX1420ECM+T is a 12-bit, 60Msps, +3.3V low-power analog-to-digital converter (ADC) with internal reference, offered in a 48-pin LQFP (TQFP-48) package, 7 mm x 7 mm x 1.4 mm, supplied on tape-and-reel. An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that samples a continuous analog input voltage and converts it into a discrete digital code, and it is a fundamental building block of every data-acquisition system. The device hierarchy sits at: ADC -> data converter -> mixed-signal IC -> semiconductor. Pipeline (pipelined) ADCs such as the MAX1420 use a multi-stage architecture that delivers high sampling rates (tens to hundreds of MSPS) at low power, making them the industry default for intermediate-frequency digitization in communications, imaging, and instrumentation equipment. Key features include 12-bit resolution, 60 MSPS sampling rate, single +3.3V analog supply, fully-differential analog input, wideband track-and-hold, internal 2.048 V reference, and CMOS-compatible parallel offset-binary digital outputs with three-state control. Power dissipation is 176 mW (typical at 60 MSPS) with a power-down mode reducing consumption to under 1 mW. The MAX1420 uses a 12-stage pipelined architecture in which each stage resolves a few bits, feeds the residue to the next stage, and applies digital error correction at the end. This architecture enables the converter to achieve 60 MSPS at substantially lower power than a full-flash converter of equivalent resolution, while preserving wide input bandwidth and excellent spurious-free dynamic range (SFDR) suitable for IF-sampling digitizers. Typical applications include digital oscilloscopes, IF-sampling communications receivers, cable-headend digitizers, medical ultrasound front-ends, and imaging systems. The wideband track-and-hold allows accurate capture of high-frequency signals up to the Nyquist limit. When designing with this part, pay attention to the analog input common-mode voltage, which must be biased to mid-supply for best distortion performance, and use an analog supply with low-noise decoupling directly at the AVDD pin. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

見積もり お問い合わせ
MAX1421CCM+D - 12-Bit 40Msps 3.3V ADC | Maxim Integrated
MAX1421CCM+D

MAX1421CCM+D - 12-Bit 40Msps 3.3V ADC | Maxim Integrated

The Maxim Integrated MAX1421CCM+D is a 12-bit, 40Msps, 3.3V low-power analog-to-digital converter (ADC) with a fully-differential input, pipelined 12-stage ADC architecture, wideband track-and-hold (T/H), and internal precision reference, packaged in a 7 mm x 7 mm 48-pin LQFP (LFQFP) form factor. According to the Maxim/Analog Devices MAX1421 datasheet, the device targets commercial 0C to +70C operation, accepts a 3.3V analog/digital supply, and provides parallel offset-binary CMOS-compatible three-state outputs for direct connection to ASICs, FPGAs, or DSPs. An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that samples continuous analog waveforms and produces discrete digital codes; within the converter family, the MAX1421CCM+D is a pipelined successive-approximation hybrid (pipelined SAR) with wideband T/H, sitting hierarchically under data converter -> ADC -> high-speed pipelined ADC -> mixed-signal IC -> semiconductor. Pipelined ADCs deliver tens-of-MHz sample rates with multi-channel per-stage gain and quantization, trading slightly higher latency for throughput efficiency - the foundation behind ultrasound, communications baseband, and CCD imaging front ends. Key features include 12-bit resolution at 40Msps minimum sampling rate, 3.3V single-supply operation, internal precision 2.048V reference, fully-differential analog input for high common-mode rejection, wideband T/H supporting IF undersampling, and parallel offset-binary digital outputs. Per the datasheet, the part typically dissipates approximately 130 mW at 40Msps from a single 3.3V rail. Pin-compatible higher- and lower-speed drop-in variants are also offered in the same 48-pin LQFP package, simplifying board-level speed migration. Typical applications include high-speed data acquisition, CCD pixel processing, baseband sampling in wireless transceivers, medical ultrasound imaging front ends, and IF digitization in cable-modem / set-top-box receivers. The internal reference and single 3.3V supply simplify bill-of-materials versus discrete-ADC designs that require external references and negative rails. When laying out the PCB, keep analog input traces short and symmetric, decouple AVDD/DVDD with 0.1 uF plus 10 uF ceramic capacitors as close to the pins as possible, and isolate the digital output bus from the analog input region with a continuous ground plane. The internal reference is stable but should still be bypassed per datasheet recommendations to minimize kickback noise into the sample-and-hold. This page consolidates distributor pricing, parametric comparison against same-family MAX1421 variants and competitor ADCs, and PCB design notes beyond what is repeated on DigiKey/Mouser product listings.

見積もり お問い合わせ
MAX1427ETN+D - 15-Bit 80Msps ADC, -79.3dBFS | Maxim Integrated
MAX1427ETN+D

MAX1427ETN+D - 15-Bit 80Msps ADC, -79.3dBFS | Maxim Integrated

The Maxim Integrated (now Analog Devices) MAX1427ETN+D is a 15-bit, 80Msps minimum sampling rate analog-to-digital converter (ADC) with a -79.3dBFS noise floor, optimized for baseband applications, packaged in a 56-pin TQFN-EP (8x8 mm) HVQCCN-style exposed-pad leadless carrier. An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that converts continuous-time analog voltages into discrete-time digital codes. High-speed pipeline ADCs such as the MAX1427 sit at the boundary between the analog front-end (anti-alias filter, driver amplifier) and the digital back-end (FPGA, DSP, or microcontroller), defining the achievable signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) of the receiver or instrumentation channel. Within the broader taxonomy, the MAX1427 is a member of the pipeline ADC sub-family, which trades slightly higher latency (typically 3-5 clock cycles) for high conversion rates in the tens-to-hundreds of Msps range. Key specifications include 80Msps minimum sampling rate, a -79.3dBFS noise floor, 76.1dB SNR at fIN = 15MHz and AIN = -1dBFS, and 93.5dBc / 94.5dBc single-tone SFDR1 / SFDR2 at fIN = 15MHz. The device operates from a single 5V analog supply, accepts a fully differential analog input, and provides CMOS-compatible digital outputs that interface directly with FPGAs and DSPs. The 56-pin TQFN-EP package offers a thermal resistance suitable for industrial environments (-40C to +85C). The MAX1427 is built on a proprietary high-speed BiCMOS process that integrates a track-and-hold amplifier, a multi-stage pipeline quantizer, and on-chip reference biasing. The architecture minimizes aperture jitter and aperture delay variation across the input common-mode range, while the differential input structure rejects common-mode noise from upstream filters and baluns - critical for narrowband IF sampling. Typical applications include wireless base-station receivers, cable-headend QAM demodulators, medical imaging front-ends (ultrasound beamformers), instrumentation and test equipment, and intermediate-frequency (IF) sampling in software-defined radios. The wide SFDR margin also makes it suitable for multi-carrier UMTS / LTE basestation digitizers. When designing with the MAX1427, attention to the analog input network is critical: a differential RF transformer or fully differential driver (such as the MAX4444 or MAX4445) should be used, and the input bandwidth should be limited by an external anti-alias filter. Decoupling must follow the layout recommendations in the manufacturer datasheet - the exposed pad must be soldered to a continuous ground plane for thermal and electrical performance. This page synthesizes distributor pricing, drop-in alternatives sourced from the same Maxim family, and practical design notes not found in the standalone datasheet, providing information gain beyond the manufacturer document.

見積もり お問い合わせ
MAX1428ETN+TD - 15-Bit 80Msps IF ADC | Maxim Integrated
MAX1428ETN+TD

MAX1428ETN+TD - 15-Bit 80Msps IF ADC | Maxim Integrated

The Maxim Integrated (Analog Devices) MAX1428ETN+TD is a 15-bit, 80Msps analog-to-digital converter (ADC) with a -78.4dBFS noise floor, optimized for intermediate-frequency (IF) digitization in communications and instrumentation. The part is specified over the industrial temperature range, ships in a 56-lead HVQCCN (7x7 mm TQFN-style) package with no-lead terminations, and is supplied on tape-and-reel for high-volume SMT assembly. An ADC is a mixed-signal data converter that samples a continuous analog input voltage and quantizes it into a discrete digital code at a defined sample rate. High-speed pipeline ADCs such as the MAX1428 sit in the hierarchy of analog-to-digital converters -> data converters -> mixed-signal ICs -> semiconductors. The MAX1428 specifically targets the IF-sampling use case where a wideband analog signal at tens to hundreds of MHz must be captured directly, eliminating a second down-conversion stage in the receiver chain. Key performance figures include a guaranteed 80 Msps minimum sample rate, 73.9 dB SNR at fIN = 70 MHz and AIN = -2 dBFS, 83 dBc/91 dBc single-tone SFDR1/SFDR2 at the same input, -82 dB multitone SFDR for two tones at 69 MHz and 71 MHz, and exceptional aperture jitter below 0.25 ps that preserves dynamic performance at high analog input frequencies. The converter's noise floor of -78.4 dBFS gives the receiver chain enough dynamic range for sensitive demodulation. Architecturally, the part uses a pipelined multi-stage converter core with proprietary digital error correction, an internal bandgap reference, and a fully differential analog input path that improves common-mode rejection and harmonic performance. The +TD tape-and-reel packaging supports automated pick-and-place on high-density RF/IF receiver boards. Typical end uses include cellular base-station IF digitizers, software-defined radio receivers, broadband cable head-end equipment, spectrum analyzer acquisition channels, and medical ultrasound beamformers. Anywhere an analog signal in the 50 MHz to 200 MHz band needs direct digitization with high spurious-free dynamic range, the MAX1428 is a viable candidate. When designing with the MAX1428, supply a low-noise analog front-end to preserve the part's dynamic range; the 0.25 ps aperture jitter spec will only deliver the rated SNR if the input driver keeps the right ADC cleaner than the ADC's own internal noise. Decouple AVDD and DVDD with separate 0.1 uF ceramic capacitors placed as close to the pins as possible. This page synthesizes distributor pricing, parametric drop-in equivalents, and dynamic-performance design notes that go beyond the headline numbers in the manufacturer datasheet.

見積もり お問い合わせ
MAX1430ETN+D - 15-Bit 100Msps IF ADC, 56-TQFN | Maxim Integrated
MAX1430ETN+D

MAX1430ETN+D - 15-Bit 100Msps IF ADC, 56-TQFN | Maxim Integrated

The Maxim Integrated (now Analog Devices) MAX1430ETN+D is a 15-bit, 100 Msps analog-to-digital converter optimized for intermediate-frequency (IF) sampling in communications receivers. It delivers a -76.8 dBFS noise floor, operates from a 5 V analog supply and a 3 V digital supply, and is housed in a 56-lead TQFN (8x8 mm) package. The integrated track-and-hold accepts a 2.2 VP-P differential full-scale input and supports a -1 dB full-power input bandwidth of 350 MHz. An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that samples a continuous-time analog waveform and quantizes each instantaneous voltage into a binary codeword. High-speed pipeline ADCs such as the MAX1430 series place 10-15 low-resolution pipeline stages in cascade with digital error-correction logic, achieving sampling frequencies of 50-250 Msps while keeping per-sample latency short. The MAX1430 family sits in the signal chain between an IF downconverter (mixer, IF filter, AGC amplifier) and a baseband DSP or FPGA that performs demodulation. Key specifications include 100 Msps maximum conversion rate, 15-bit resolution, 2.2 VP-P differential full-scale input range, -76.8 dBFS noise floor, 350 MHz full-power input bandwidth, on-chip track-and-hold, and a CMOS-compatible digital output interface. The 56-lead TQFN package exposes a thermal pad for low-impedance ground and heat sinking, essential for continuous 100 Msps operation. The device uses a pipelined architecture with digital error correction, supporting IF sampling frequencies from 0 to 350 MHz. Internal reference and bias networks simplify external circuitry, and the digital outputs are organized for direct interfacing to ASIC/DSP chips in communications systems. Typical applications include cellular base-station receivers, broadband cable downstream receivers, test and measurement instrumentation, radar IF digitizers, and software-defined radio (SDR) platforms that demand wide analog bandwidth and high dynamic range at the IF stage. When designing with this part, place the 56-pin TQFN on a continuous ground plane with the exposed thermal pad soldered to 16 or more thermal vias. Decouple AVDD and DVDD separately with 0.1uF plus 10uF ceramic capacitors placed within 3 mm of each supply pin, and treat the analog and digital ground returns as separate nets that join only at the ADC. This page synthesizes distributor pricing, pin-compatible drop-in alternatives, and practical layout guidance beyond the manufacturer datasheet.

見積もり お問い合わせ
MAX1436ECQ+ - Octal 12-Bit 40Msps LVDS ADC | Maxim/Analog Devices
MAX1436ECQ+

MAX1436ECQ+ - Octal 12-Bit 40Msps LVDS ADC | Maxim/Analog Devices

The Maxim Integrated (now Analog Devices) MAX1436ECQ+ is an octal, 12-bit, 40Msps analog-to-digital converter (ADC) with fully differential inputs, a pipelined architecture, digital error correction, and serial LVDS outputs, packaged in a 100-pin TQFP (14 mm x 14 mm x 1 mm) with an exposed thermal pad. The device operates from a 1.8 V analog supply and delivers serial LVDS output data to minimize pin count and EMI in multichannel systems. An analog-to-digital converter (ADC) is a mixed-signal integrated circuit that samples continuous-time analog signals and produces discrete-time digital codes proportional to the input amplitude. Within the converter hierarchy, the MAX1436 belongs to the pipeline ADC subclass, which interleaves multiple low-resolution stages to achieve high sampling rates while keeping per-stage power low. Octal pipeline ADCs such as the MAX1436 are widely used in ultrasound front ends, medical imaging arrays, communications base stations, and multi-channel instrumentation where eight synchronized channels of 12-bit conversion at 40Msps are required. Key specifications of the MAX1436ECQ+ include 12-bit resolution, 40Msps maximum sampling rate, an integrated input track-and-hold, internal voltage reference, and low-voltage differential signaling (LVDS) outputs that reduce ground bounce and radiated noise. The pin-compatible family offers higher speed grades (MAX1437 at 50Msps, MAX1438 at 65Msps), allowing designers to scale sampling rate without changing PCB layout. Architecturally, each of the eight ADC channels uses a fully differential switched-capacitor pipelined front end followed by digital error correction logic. The LVDS serializer consolidates eight channels' worth of parallel data onto a small number of differential pairs, simplifying board routing and reducing the number of digital supply pins required. The exposed pad (EP) on the TQFP package provides a low thermal resistance path to the PCB copper pour, critical because the LVDS drivers and converter cores dissipate power continuously at full sampling rate. Typical applications include ultrasound beamforming, medical imaging, instrumentation, multichannel communications, and phased-array radar. The wide input bandwidth and 40Msps rate make the part suitable for digitizing intermediate-frequency (IF) signals in software-defined radio receivers as well as time-interleaved acquisition systems. When designing with this device, place 0.1 uF and 10 uF decoupling capacitors as close as possible to each supply pin, and provide a solid ground plane beneath the exposed pad with a minimum of 16 thermal vias to keep junction temperature within the -40C to +85C operating range. Source impedance matching at the analog inputs is critical to preserve the specified spurious-free dynamic range (SFDR) at full-rate operation. This page synthesizes distributor pricing for MAX1436ECQ+, drop-in TQFP-100 pin-compatible alternatives, application references, and practical design notes not consolidated in the manufacturer datasheet.

見積もり お問い合わせ
MAX1436ECQ+TD - Octal 12-Bit 40Msps 1.8V ADC | Analog Devices
MAX1436ECQ+TD

MAX1436ECQ+TD - Octal 12-Bit 40Msps 1.8V ADC | Analog Devices

The Analog Devices MAX1436ECQ+TD is an octal, 12-bit, 40Msps analog-to-digital converter (ADC) with fully differential inputs, a pipelined architecture, and digital error correction. It operates from a single 1.8V supply and provides self-aligned serial LVDS outputs for data, clock, and frame-alignment signals, with the output data presented in two's complement or binary format. The device is housed in a 100-pin TQFP package (14 mm x 14 mm x 1 mm) with an exposed thermal pad, specified for the extended industrial temperature range of -40C to +85C. The MAX1436ECQ+TD belongs to the high-speed pipelined ADC product family, a category of converters that use a multi-stage pipeline architecture to achieve high sample rates (tens of Msps to >100 Msps) while maintaining 10- to 16-bit resolution. Within the broader data-converter hierarchy, the MAX1436 sits above general-purpose successive-approximation register (SAR) ADCs in sampling speed and below high-speed flash ADCs in resolution flexibility. Its 1.8V single-supply operation makes it a member of the low-voltage, high-speed mixed-signal IC family used extensively in portable ultrasound, multichannel communications, and instrumentation front-ends. Key specifications include a maximum sample rate of 40Msps, an integral nonlinearity (INL) of 0.5 LSB (typical), a signal-to-noise ratio (SNR) of 70 dB at 10 MHz input, and a spurious-free dynamic range (SFDR) of 85 dBc. The serial LVDS output interface reduces package pin count and simplifies board routing for multi-channel systems, while the pipelined architecture delivers single-clock-cycle conversion latency, simplifying digital-domain calibration pipelines. Typical applications span instrumentation, multichannel communications, ultrasound and medical imaging, and multichannel data acquisition systems where 8 simultaneous channels of 12-bit conversion are required at high throughput. The wide operating temperature range also supports industrial process-control front-ends. Pin-compatible variants listed in the datasheet allow upgrade to higher sample rates within the same PCB footprint. Designers should pay attention to the analog input common-mode voltage requirement and the LVDS output termination scheme. The exposed pad on the TQFP-100 package must be soldered to a sufficiently large copper pour to keep junction temperature within limits at full multi-channel conversion duty cycles. Decoupling capacitor placement adjacent to each supply pin is critical for achieving the published SNR figures.

見積もり お問い合わせ
MAX14431CAEE+ - 4-Channel 200Mbps Digital Isolator | ADI
MAX14431CAEE+

MAX14431CAEE+ - 4-Channel 200Mbps Digital Isolator | ADI

Analog Devices MAX14431CAEE+ is a four-channel, low-power digital galvanic isolator rated for 3000 Vrms isolation, data rates up to 200 Mbps, and typical common-mode transient immunity of 50 kV/us. It is packaged in a narrow 16-SSOP measuring approximately 0.154 inch, or 3.90 mm, in body width. The device accepts 1.71 V to 5.5 V supplies and is designed to transfer digital signals across circuits operating in different power domains while limiting conduction through the isolation barrier. According to the manufacturer datasheet, the MAX14431 family can operate with as little as 0.58 mW per channel at 1 Mbps when powered from 1.8 V. A digital isolator is a signal-conditioning semiconductor that provides electrical separation between two circuits while allowing data to pass between them. Digital isolators belong to the interface IC and power-management-adjacent categories of semiconductor components. Unlike ordinary buffers or drivers, a galvanic isolator prevents ground potential differences, switching transients, and high-voltage events from being directly conveyed through the signal path. This makes digital isolators especially useful in industrial automation, communications, medical equipment, and other systems where functional isolation protects both equipment and users. The MAX14431CAEE+ supports four isolated channels, configurable channel direction, and high-speed operation up to 200 Mbps. Verified distributor listings identify SPI digital isolation, 3000 Vrms withstand voltage, and typical CMTI of 50 kV/us as headline features. The narrow SSOP-16 package supports compact layouts, while the specified -40 C to +125 C operating range permits deployment across industrial temperature environments. Its low-power operation is useful when isolation must be maintained without allowing the isolator itself to dominate system energy use. The MAX14431 family is based on proprietary process technology intended to combine low power, fast data transfer, and reinforced isolation behavior. Exact propagation-delay, pulse-width-distortion, channel-direction, and timing values must be confirmed from the applicable manufacturer datasheet before final timing-budget design. The narrow package also makes isolation-capacitor placement, creepage, clearance, and PCB contamination control important engineering concerns; isolation is not achieved simply by inserting the IC into the signal path. Typical applications include isolated SPI links, industrial control and instrumentation, isolated data acquisition, power-conversion feedback, medical monitoring interfaces, and communication equipment. For these applications, the four-channel structure can reduce the number of discrete isolation components required. The combination of low supply voltage, fast digital transfer, and narrow package dimensions is valuable when the board area and standby power budget are constrained. Designers should verify the complete pinout, input and output supply arrangement, channel-direction configuration, isolation capacitance, timing limits, and recommended PCB layout against the MAX14430-MAX14432 manufacturer datasheet. Decoupling capacitors should be placed near the relevant supply pins, and the isolation barrier should not be bridged by copper, solder mask contamination, or high-current return paths. This page combines verified distributor data, manufacturer documentation, practical design guidance, and sourcing information to support engineering selection.

見積もり お問い合わせ
MAX144BCUA - 12-Bit 108ksps 2-Ch SAR ADC | Maxim Integrated
MAX144BCUA

MAX144BCUA - 12-Bit 108ksps 2-Ch SAR ADC | Maxim Integrated

The Maxim Integrated MAX144BCUA is a +2.7V to +5.25V, low-power, 2-channel, 108ksps, serial 12-bit successive-approximation analog-to-digital converter (ADC) housed in an 8-pin µMAX (8-MSOP) surface-mount package. The 'B' grade provides 12-bit resolution with ±1 LSB INL and the part is shipped in the commercial 0°C to +70°C temperature grade. The MAX144 family shares a common pinout with the MAX145 (14-bit version of the same die family), enabling drop-in compatibility when higher resolution is required. A SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a type of ADC that converts an analog input to a digital output using a binary search algorithm against an internal DAC. SAR ADCs are prized for low latency (single-cycle conversion), deterministic behavior, and low power consumption, which makes them ideal for multiplexed data-acquisition systems, sensor readouts, and battery-powered instrumentation. The MAX144 sits in the precision-low-power tier of the SAR ADC hierarchy: SAR ADC → successive-approximation ADC → ADC → data converter → signal chain IC → semiconductor. Key features include a 7.4 µs successive-approximation conversion time, automatic power-down between conversions reducing current to sub-µA, fast 2.5 µs wake-up, an internal 4.096 MHz oscillator, and a high-speed SPI/QSPI/MICROWIRE-compatible 3-wire serial interface. Two analog input channels are multiplexed to a single ADC core, and the device operates from a single 2.7V to 5.25V supply. The integrated input track-and-hold accepts full-scale inputs from 0 to VREF. Architecturally, the MAX144BCUA combines a charge-redistribution DAC with a successive-approximation register and on-chip clock, eliminating the need for an external oscillator. The proprietary AutoShutdown® mode drops supply current to 0.3 µA (typical) between conversions, drawing active current only when conversions are in progress. This combination of high throughput and nanoamp-level standby current makes it well-suited for power-budgeted portable and loop-powered systems. Typical applications include portable data logging, pen-tablet digitizers, battery-powered instrumentation, plus/minus instrumentation front ends, and process-control I/O modules. The part is also used in isolated sensor readouts where the low serial-interface pin count (4 signals: CS, SCLK, DOUT, DIN) simplifies optocoupler or digital-isolator bridges. A single-decoupling 0.1 µF ceramic capacitor close to VDD and a 10 µF bulk cap are typically sufficient. Reference decoupling with 1 µF plus 0.1 µF at REF is critical for 12-bit performance; avoid running digital traces under the analog input pins on the PCB. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes not found in the manufacturer datasheet.

見積もり お問い合わせ
MAX144BEUA - 12-Bit 108ksps 2-Ch Serial ADC | Maxim
MAX144BEUA

MAX144BEUA - 12-Bit 108ksps 2-Ch Serial ADC | Maxim

The Analog Devices (formerly Maxim Integrated) MAX144BEUA is a 12-bit, 108 ksps, 2-channel, low-power successive-approximation analog-to-digital converter (SAR ADC) housed in an 8-pin µMAX/uSOP package. It operates from a single +2.7 V to +5.25 V supply with separate analog and digital supply inputs, integrating a 7.4 µs successive-approximation ADC core, automatic power-down, fast 2.5 µs wake-up, an on-chip clock, and a high-speed 3-wire SPI/MICROWIRE-compatible serial interface. The "B" grade specifies the industrial operating temperature range of -40 °C to +85 °C. A SAR ADC (successive-approximation-register analog-to-digital converter) is a type of data converter that uses a binary-search algorithm against an internal DAC to resolve one bit per clock cycle. SAR ADCs occupy the middle ground between flash converters (fast but power-hungry, large) and sigma-delta ADCs (high resolution but lower speed, requires filtering). They are favored for multiplexed multi-channel data acquisition, sensor front-ends, and portable instrumentation where deterministic latency, low latency, low power, and small packages are simultaneously required. Key features of the MAX144BEUA include 2 single-ended analog input channels (AIN1, AIN2), an external reference input (REF), a low 1.6 mA typical supply current at 108 ksps, automatic power-down to < 1 µA between conversions, and the 8-pin µMAX (uSOP) footprint that saves board area versus 8-pin SOIC. The serial interface is compatible with SPI, QSPI, and MICROWIRE devices, simplifying connections to most microcontrollers and DSPs. The MAX144 family uses a charge-distribution DAC architecture combined with an on-chip clock and sample-and-hold, achieving ±1 LSB INL and DNL with no missing codes at 12 bits. Power-down is automatic at the end of each conversion, dropping the supply current to < 1 µA - critical for battery-powered applications that need long run-time. The fast 2.5 µs wake-up allows high throughput without duty-cycling penalty in burst-mode sampling. Typical applications include portable data logging, handheld multimeters and test instruments, battery-powered sensor readouts, industrial process control front ends, and medical instruments such as glucose meters and patient monitors. Two single-ended channels make the part especially suited to dual-sensor measurement (e.g., temperature + pressure, or two thermocouples). When designing with the MAX144BEUA, place the 0.1 µF supply bypass capacitor as close as possible to VDD and use a low-impedance external reference (such as MAX6126 or MAX6160) to maximize SNR. The serial interface is read-only on the MAX144 - host software must provide SCLK and read DOUT within the conversion window; consult the datasheet timing diagram before wiring to a busy SPI bus. This page synthesizes distributor pricing, drop-in and same-family alternatives from Maxim Integrated's MAX14x portfolio, and practical design notes not collected in the manufacturer datasheet alone.

見積もり お問い合わせ
MAX14515AEWA+T - High-Voltage Liquid Lens Driver 8-WLP | Maxim Integrated
MAX14515AEWA+T

MAX14515AEWA+T - High-Voltage Liquid Lens Driver 8-WLP | Maxim Integrated

The Analog Devices (Maxim Integrated) MAX14515AEWA+T is a high-voltage liquid lens driver IC that combines a charge-pump boost converter with an integrated H-bridge driver, controlled through an I²C interface, in an 8-bump WLP package. It provides a compact, differential AC output for tunable liquid lenses used in miniature autofocus camera modules, replacing bulkier discrete HV-driver solutions. A liquid lens driver is a specialized power-management IC that converts a low-voltage DC source into the bipolar, AC high-voltage waveform required to deform an electrowetting-based liquid lens, thereby adjusting optical focus. Liquid lens drivers sit within the camera-module subsystem alongside image sensors, ISP front-ends, and voice-coil/focus actuators, forming the hardware chain that delivers electronically-tunable focus to smartphones, webcams, AR/VR cameras, machine-vision heads, and barcode scanners. Key features include I²C-controlled output voltage amplitude adjustment, integrated H-bridge for bipolar lens excitation, internal charge pump that boosts a 2.7V–5.5V supply up to lens-driving levels, low-power shutdown mode, small-footprint 8-bump WLP (Wafer-Level Package), and minimal external component count. The high-voltage differential output directly drives the lens cell, eliminating the need for an external transformer or high-voltage amplifier. From an architecture standpoint, the MAX14515 uses a Dickson charge-pump stage to generate the high DC rail, followed by an H-bridge that commutates that rail at the lens-resonance frequency to produce the AC field. The I²C interface provides register-based amplitude and mode control, while internal logic manages start-up sequencing and fault protection. The 8-WLP package dramatically reduces board area, which is critical for camera modules where z-height and x/y footprint are tightly constrained. Typical applications include autofocus liquid-lens modules in smartphones and tablets, AR/VR camera lenses, security and surveillance cameras with electronic focus, industrial machine-vision cameras, and endoscope/imaging probes. Its minimal BOM and small footprint suit camera-module integration where space is at a premium and lens drive efficiency matters. When designing with this device, ensure the I²C bus pull-ups match the controller's logic level and place the charge-pump flying capacitors as close to the IC as possible. Verify that the lens-resonance frequency lies within the part's commutating range, and respect the WLP's strict MSL1 handling requirements to avoid bump-damage during reflow. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone, providing engineers with a single decision-ready reference for sourcing and second-sourcing the MAX14515AEWA+T liquid-lens driver.

見積もり お問い合わせ
MAX145ACPA - 12-Bit 108ksps 2-Ch Serial ADC | Maxim Integrated
MAX145ACPA

MAX145ACPA - 12-Bit 108ksps 2-Ch Serial ADC | Maxim Integrated

The Maxim Integrated MAX145ACPA is a 12-bit, 108 ksps, 2-channel, low-power successive-approximation analog-to-digital converter (SAR ADC) in an 8-pin PDIP package, operating from a single +2.7 V to +5.25 V supply with built-in automatic power-down. The device features a 7.4 microsecond successive-approximation conversion engine, an on-chip clock, a high-speed 3-wire SPI/QSPI/MICROWIRE-compatible serial interface, and a 2.5 microsecond wake-up from shutdown for battery-friendly duty-cycled measurements. What is a low-power SAR ADC? A successive-approximation register ADC is a precision data converter type that resolves one bit per clock cycle using a binary search against an internal DAC; it sits in the taxonomy analog-to-digital converter -> data converter -> signal chain IC -> semiconductor. Compared with delta-sigma ADCs, SAR parts offer single-cycle latency and deterministic acquisition, which is why they dominate multiplexed multi-channel data-acquisition front ends, sensor readouts, and embedded instrumentation loops. Key specifications include 108 ksps maximum sampling rate, +/-1 LSB INL (max), +/-1 LSB DNL (no missing codes guaranteed), an internal 2.5 V reference option plus external reference mode, single-ended analog inputs with channel 2 configurable as pseudo-differential, and 1.5 mA maximum supply current at 108 ksps dropping to under 1 microamp in power-down. The MAX145ACPA guarantees 0.1 LSB sample-to-sample crosstalk between its two input channels and provides a serial interface software-select. Architecturally, the MAX145 combines an input track-and-hold, a capacitive-charge redistribution DAC, a comparator and SAR logic, plus the on-chip oscillator and reference buffer. The auto-power-down feature draws under 1 microamp between conversions, making it ideal for duty-cycled battery measurements. The MAX145ACPA is the pseudo-differential input variant of the family (max 127 distinguishes true-differential MAX144 versus pseudo-differential MAX145 versus single-channel MAX144). Typical applications include portable data loggers, loop-powered 4-20 mA sensor transmitters, handheld multimeters, battery monitoring boards, thermistor/RTD signal conditioning, and industrial process-control front ends. The wide 2.7 V to 5.25 V supply range lets it share the same rails as the host microcontroller. When designing with the MAX145ACPA, place a 0.1 microfarat decoupling capacitor close to the supply pin and respect the 8 microsecond acquisition-time minimum after channel switching. Drive CS low to initiate conversion and read the MSB-first data on the falling edge of SCLK per the SPI timing diagram in the datasheet. This page consolidates distributor pricing for the MAX145ACPA in 8-pin PDIP, drop-in equivalents, comparison against the MAX144 family siblings, and practical design notes that are not aggregated on any single distributor listing.

見積もり お問い合わせ
MAX145ACUA - 12-Bit 108ksps 1-Ch SAR ADC, 8-µMAX | Analog Devices
MAX145ACUA

MAX145ACUA - 12-Bit 108ksps 1-Ch SAR ADC, 8-µMAX | Analog Devices

The Maxim Integrated MAX145ACUA (now part of Analog Devices) is a 12-bit, 108 ksps, low-power, pseudo-differential, 2-channel successive-approximation analog-to-digital converter (SAR ADC) in an 8-pin µMAX/uSOP surface-mount package. It operates from a single +2.7 V to +5.25 V supply and features an internal track/hold, on-chip clock, automatic power-down, fast 2.5 µs wake-up, and a high-speed 3-wire SPI/QSPI/MICROWIRE-compatible serial interface. The MAX145ACUA also includes the "A" temperature grade variant specified for commercial 0 °C to +70 °C operation. A SAR (successive-approximation-register) ADC is a type of analog-to-digital converter that uses a binary search through an internal DAC to convert an analog input to a digital code one bit per clock cycle. SAR ADCs combine very low latency (one conversion cycle, no pipeline delay), excellent DC accuracy, and simple serial interfaces. They sit within the broader category of data converters (ADC/DAC) under signal-chain ICs and are typically the right choice when a system needs deterministic single-shot sampling at moderate speeds, low power, and small footprint - as opposed to high-speed pipeline ADCs or integrating ADCs optimized for very low noise at slow rates. The MAX145 family delivers 108 ksps sampling at 0.9 mA (with VDD = +3 V) and drops to just 100 µA at 10 ksps and 10 µA at 1 ksps. Power-down current is 0.2 µA, making the part ideal for battery-powered and portable data-acquisition systems. The internal 2.5 MHz typ oscillator and the integrated track/hold eliminate the need for an external precision clock and a front-end sample-and-hold amplifier. Typical applications include pen-digitizers, portable instrumentation, data loggers, isolated measurement front-ends, and 4–20 mA loop-powered sensors. The MAX145 is also well suited for medical monitoring accessories and industrial process control modules that must operate for long periods from a small battery. When designing with the MAX145ACUA, ensure the analog input remains within the pseudo-differential common-mode range and that REF+ / REF- decoupling is placed as close as possible to the pins. For systems that require true bipolar or fully differential inputs, prefer the MAX144 (single-ended) or a dedicated delta-sigma ADC instead. This page consolidates distributor pricing, drop-in alternatives, and engineering notes that supplement the manufacturer datasheet, including selection guidance versus the MAX144 and competitor 8-pin SAR ADCs.

見積もり お問い合わせ
MAX145AEPA - 12-Bit 108ksps 2-Ch Serial ADC | Analog Devices
MAX145AEPA

MAX145AEPA - 12-Bit 108ksps 2-Ch Serial ADC | Analog Devices

The Analog Devices (formerly Maxim Integrated) MAX145AEPA is a +2.7V to +5.25V, low-power, 2-channel, 108ksps, serial 12-bit successive-approximation analog-to-digital converter (SAR ADC) housed in an 8-pin plastic DIP (PDIP) package. The automotive-grade 'E' suffix indicates an extended -40C to +85C operating temperature range. The device integrates a 2.5V internal reference, on-chip clock generator, automatic power-down, fast 2.5us wake-up, and a high-speed 3-wire SPI/QSPI/MICROWIRE-compatible serial interface, providing a complete compact data-acquisition front end for low-power embedded designs. What is a SAR ADC? A successive-approximation-register analog-to-digital converter is a precision ADC architecture that uses a binary-search algorithm against an internal DAC to resolve an analog sample one bit at a time over N conversion cycles for N-bit resolution. SAR ADCs occupy the middle ground between flash ADCs (very fast, high power, low resolution) and sigma-delta ADCs (high resolution, lower bandwidth): they deliver medium-to-high resolution (12-18 bits typical) at medium-to-high speed (tens to thousands of ksps) with no pipeline latency, making them ideal for multiplexed multi-channel data acquisition, instrumentation, and control-loop sampling. SAR ADCs belong to the data-converter IC family, which sits inside the broader mixed-signal and power-management hierarchy of an embedded system. Key features include 108ksps throughput, ±1 LSB (max) integral nonlinearity (INL), ±0.5 LSB differential nonlinearity (DNL, no missing codes), a true-differential analog input stage on the MAX145 (single-ended on MAX144), and 3.2mW active power consumption at VDD = +3.6V dropping to under 10uA in shutdown. The 8-pin DIP footprint enables easy through-hole prototyping, breadboarding, and repair-friendly designs where hand-soldering or socket-mounting is preferred over SMD. The MAX145AEPA is a popular drop-in companion to the MAX144AEPA for designs that need true-differential inputs at the same 12-bit resolution and serial interface. Typical applications include handheld multimeters and test instruments, portable battery-powered sensor readout boards, industrial process-control loops, panel meters, temperature/voltage data loggers, and portable medical monitoring. The wide supply range (2.7V to 5.25V) lets a single part serve both 3.3V microcontroller rails and 5V analog front ends without level-shifting. When designing with the MAX145AEPA, place 0.1uF bypass capacitors close to the AVDD and DVDD pins (these are tied together on the 8-pin DIP) and ensure the SPI SCLK line is free of glitches because the device lacks an SCLK noise filter. Use the active-low SHDN pin to drop quiescent current below 10uA between conversions in battery-powered designs.

見積もり お問い合わせ
MAX145AEUA - 12-Bit 108ksps 2-Ch Serial ADC | Maxim Integrated
MAX145AEUA

MAX145AEUA - 12-Bit 108ksps 2-Ch Serial ADC | Maxim Integrated

The Maxim Integrated MAX145AEUA is a 12-bit, 108 ksps, 2-channel, low-power successive-approximation analog-to-digital converter (SAR ADC) in an 8-pin µMAX (uSOP) package. It operates from a single +2.7V to +5.25V supply and features two pseudo-differential analog input channels, automatic power-down, fast 2.5 µs wake-up, an on-chip clock, and a high-speed 3-wire SPI/QSPI/MICROWIRE-compatible serial interface. An SAR ADC is a type of analog-to-digital converter that uses a successive-approximation register to compare the input voltage against a precision DAC, bit-by-bit, achieving conversion in a fixed number of clock cycles. SAR ADCs occupy a niche between flash ADCs (fast, low resolution, high power) and sigma-delta ADCs (high resolution, slow). The MAX145 belongs to the broader data-converter IC family, itself a subset of signal-chain semiconductors that include amplifiers, filters, and references. Its low 3.2 mW power consumption at VDD = +3.6V makes it well-suited to battery-powered and portable designs. The MAX145AEUA's -A temperature grade extends the operating range from -40°C to +85°C, suiting industrial environments. It supports a 7.4 µs successive-approximation ADC core, automatic power-down between conversions to save energy, and a fast 2.5 µs wake-up time that keeps average current low in multiplexed, multi-channel scans. The internal 4.096V or external reference option (chosen by the REF pin) gives designers flexibility between absolute accuracy and ratiometric measurement. Architecturally, the part combines a switched-capacitor input track-and-hold, an internal clock generator, and a precision comparator under SAR control. The pseudo-differential input configuration rejects common-mode noise and is especially useful when reading signals referenced to a non-ground midpoint, such as bridge sensors, thermistors, or battery-stack mid-points. The MAX145AEUA differs from the pin-compatible MAX144 only by analog input topology: MAX144 is single-ended, while MAX145 is pseudo-differential. Typical applications include portable data logging, hand-held instrumentation, battery-powered sensors, isolated industrial monitoring with 4-20 mA loops, and digital panel meters. Designers favor the MAX145AEUA when they need true 12-bit accuracy on a tiny µMAX footprint, an easily-driven serial interface, and standby currents low enough to leave the ADC in-circuit all the time. A key design consideration is supply bypassing: place a 0.1 µF ceramic capacitor as close as possible to the VDD pin, plus a 4.7 µF tantalum or larger ceramic cap on the same node, to suppress digital switching noise. The reference pin must be bypassed with at least 0.1 µF, and a 10 µF cap stabilizes the reference when using the internal 4.096V source. Trace lengths from CNVST, SCLK, and DOUT should be kept short, and the AGND pin must tie directly to a low-impedance ground plane to avoid digital-coupling errors. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

見積もり お問い合わせ
MAX145BEPA - 12-Bit 108ksps 2-Ch Serial ADC | Maxim Integrated
MAX145BEPA

MAX145BEPA - 12-Bit 108ksps 2-Ch Serial ADC | Maxim Integrated

The Maxim Integrated MAX145BEPA is a +2.7V to +5.25V, low-power, 2-channel, 108ksps, 12-bit successive-approximation analog-to-digital converter (ADC) housed in an 8-pin PDIP package. According to the Analog Devices / Maxim MAX144/MAX145 datasheet, the device features a 7.4 microsecond successive-approximation ADC core, automatic power-down, a 2.5 microsecond wake-up time, an on-chip clock, and a high-speed 3-wire SPI/QSPI/MICROWIRE-compatible serial interface. A SAR (Successive Approximation Register) ADC is a type of analog-to-digital converter that uses a binary search algorithm through an internal DAC to digitize an analog input one bit at a time per clock cycle. SAR ADCs are prized for low latency (deterministic acquisition time), high accuracy at moderate sample rates, and the absence of pipeline delay, making them well-suited to multiplexed multi-channel data-acquisition systems, instrumentation, and process control. Key features include two single-ended analog input channels (CH0, CH1) selected via software, an analog supply range of +2.7V to +5.25V, an external reference input (REF), and a low supply current that drops to microamp levels in power-down mode. The MAX145BEPA industrial-grade (-40C to +85C) PDIP package supports through-hole assembly and is fully RoHS compliant in the + variant (MAX145BEPA+). Architecturally, the MAX145BEPA integrates an input sample-and-hold, an internal 12-bit DAC, a comparator, a successive-approximation register, and SPI-compatible digital I/O on a single CMOS die. The automatic power-down function between conversions reduces average supply current to a fraction of the active value, which is critical for battery-powered or energy-harvesting applications. Typical applications include portable data loggers, industrial process-control front-ends, battery-powered instrumentation, sensor signal conditioning read-out, and handheld metering equipment where 12-bit resolution at up to 108 kilosamples per second is sufficient. When laying out a PCB, keep analog and digital grounds joined at a single point near the ADC GND pin to preserve the 12-bit accuracy across the full sample rate.

見積もり お問い合わせ
MAX145BEUA - 12-Bit, 108ksps, 2-Ch SAR ADC | Maxim Integrated
MAX145BEUA

MAX145BEUA - 12-Bit, 108ksps, 2-Ch SAR ADC | Maxim Integrated

The Maxim Integrated MAX145BEUA is a 12-bit, 108ksps, 2-channel successive-approximation analog-to-digital converter (ADC) housed in an 8-pin μMAX package. It operates from a single +2.7V to +5.25V supply, features a 7.4 µs successive-approximation conversion cycle, automatic power-down, 2.5 µs wake-up, an internal 4 MHz oscillator, and a high-speed 3-wire SPI/QSPI/MICROWIRE-compatible serial interface. An ADC (analog-to-digital converter) is a data-conversion IC that samples a continuous analog voltage and converts it into a discrete digital code proportional to the input level. SAR (successive-approximation register) ADCs balance speed, resolution, and power efficiency, making them the dominant architecture for multiplexed low-power sensing and instrumentation. Within the broader IC hierarchy: ADC -> data converter -> mixed-signal IC -> signal chain -> semiconductor. SAR ADCs are typically preferred over delta-sigma or pipelined types when low latency, low power, and moderate resolution (10-16 bits) are required at sample rates up to a few hundred kilosamples per second. The MAX145's two analog input channels, plus its low-power shutdown mode that draws typically < 1 µA between conversions, make it well suited to portable, multiplexed sensor systems. The 8-pin μMAX footprint and 3-wire serial interface reduce board area and pin count compared to parallel-output ADCs. The successive-approximation architecture uses an internal binary-weighted capacitor DAC and comparator. Each conversion takes 7.4 µs, and the serial interface streams out 12 bits at clock rates up to the internal 4 MHz oscillator limit, allowing the host microcontroller to read conversions quickly between samples. Typical applications include portable data loggers, battery-powered instrumentation, multiplexed sensor signal chains (temperature, pressure, strain gauge), loop-powered 4-20 mA transmitters, and handheld meter front-ends where low supply current, small PCB area, and a simple SPI host interface are essential design constraints. When designing with the MAX145BEUA, place a 0.1 µF decoupling capacitor as close as possible to the VDD pin and ensure the analog input traces are routed away from digital switching nodes to minimize coupling noise. Use the automatic power-down mode between conversions to achieve < 1 µA quiescent current in duty-cycled sensor applications. This page synthesizes distributor pricing, pin-compatible drop-in alternatives, practical layout notes, and an FAQ set not found on the manufacturer datasheet, giving engineers a single source for part selection, sourcing, and design guidance.

見積もり お問い合わせ
MAX146AEAP - 12-Bit 8-Ch 133 kSPS SAR ADC | Analog Devices
MAX146AEAP

MAX146AEAP - 12-Bit 8-Ch 133 kSPS SAR ADC | Analog Devices

The Analog Devices MAX146AEAP is a +2.7V low-power, 8-channel, serial 12-bit successive-approximation analog-to-digital converter (SAR ADC) housed in a 20-pin SSOP (EAP) package. It integrates an 8-channel analog input multiplexer (4 differential or 8 single-ended), a high-bandwidth track-and-hold, a 2.5V internal reference (the MAX146 variant), a serial SPI/QSPI/MICROWIRE-compatible interface, and a low-power shutdown mode, sampling at up to 133 kSPS. A SAR ADC is a type of analog-to-digital converter that uses a binary-search successive-approximation algorithm to convert an analog input to a digital code in a fixed number of clock cycles per conversion. SAR ADCs sit between delta-sigma converters (which trade speed for resolution) and flash ADCs (which offer speed but consume large power and silicon area), making them the workhorse choice for multiplexed data-acquisition channels at medium speeds (10 kSPS to 1 MSPS) and moderate resolution (10 to 16 bits). Key features of the MAX146AEAP include 133 kSPS throughput, low 1.3 mA operating supply current (shutting down to 1 microamp between conversions), single +2.7V to +5.25V analog supply operation, hard-wired active-low SHDN-bar input plus software-controllable auto-shutdown at end-of-conversion, an internal 2.5V reference with ±1.5% adjustable range via the reference-buffer amplifier, and integrated input protection rated to ±16V (allowing direct connection to industrial sensor lines without external clamping). The device uses a capacitive-DAC SAR core with auto-calibrated MSBs and a low-drift buried-zener reference, achieving ±1 LSB INL (max) and ±1 LSB DNL (no missing codes at 12 bits). The high-bandwidth track-and-hold supports input bandwidths above 2 MHz, preserving accurate capture of fast transient signals. A serial digital interface runs from a separate +2.7V to +5.25V digital supply, enabling mixed-voltage designs where the ADC and downstream microcontroller use different rails. Typical applications for the MAX146AEAP include portable battery-powered data loggers, multichannel sensor-front-end digitizers (thermocouple, strain-gauge bridge, pressure transducer), industrial process-control instrumentation with 4-20 mA loop inputs, patient-monitoring medical devices, and automotive body-system sensor acquisition. The integrated 8-channel mux and internal reference minimize BOM cost and PCB area. When designing with the MAX146AEAP, place a 0.1 microfarad ceramic bypass capacitor within 5 mm of AVDD and a 1 microfarad tantalum or ceramic capacitor between REF and AGND, and connect AVSS/DVSS to a clean ground plane. Drive unused analog input pins to a valid DC level (AVDD or AVSS) to prevent input-channel crosstalk; do not leave analog inputs floating. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

見積もり お問い合わせ
MAX146AEPP+ - 12-Bit 8-Ch 133ksps ADC | Maxim Integrated
MAX146AEPP+

MAX146AEPP+ - 12-Bit 8-Ch 133ksps ADC | Maxim Integrated

The Maxim Integrated MAX146AEPP+ is a 12-bit, 8-channel, low-power, serial-interface successive-approximation ADC housed in a 20-pin PDIP (EPP) package. It accepts either 8 single-ended or 4 differential analog inputs and supports throughput rates up to 133 ksps. The device operates from a +2.7 V to +3.6 V single supply, drawing only about 1.2 mA at full speed and dropping to under 1 µA in shutdown. An SAR ADC (Successive-Approximation Register Analog-to-Digital Converter) is a precision data-conversion architecture that resolves each conversion in a fixed number of clock cycles by binary-searching against an internal DAC. SAR ADCs offer a deterministic latency, no pipeline delay, and excellent DC accuracy, making them a workhorse for multiplexed multi-channel data-acquisition systems, sensor readout, and instrumentation front-ends where the input signal bandwidth is below a few hundred kHz. Key features of the MAX146AEPP+ include an internal 2.5 V reference (with separate REFADJ pin for fine adjustment), a low-noise sampling front-end, hardware-/software-configurable unipolar/bipolar input ranges, and an SPI/QSPI/MICROWIRE-compatible serial interface. Internal autoshutdown between conversions drops the supply current dramatically for battery-powered or duty-cycled applications. The device also provides an analog input clamp that protects the input from over-voltage transients. Typical applications include portable instrumentation, 4-20 mA industrial loop digitizers, multi-channel sensor data loggers, patient monitoring front-ends, and front-panel meter signal conditioning. The MAX146AEPP+ is pin-compatible with the MAX146BEPP+ (higher-speed variant) and other members of the MAX146 family in the same 20-pin PDIP footprint, simplifying system upgrades and BOM substitutions. When designing with this device, decouple VDD with a 10 µF and 0.1 µF capacitor pair placed within 5 mm of the supply pins, route the analog and digital grounds separately back to a single star point, and keep the analog inputs away from the serial clock trace. The internal reference is adequate for many applications, but an external low-noise reference (e.g. MAX6126) is recommended for absolute accuracy better than ±2 LSB. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.

見積もり お問い合わせ
MAX146BCAP - 12-Bit 8-Ch 133kSPS Serial ADC | Maxim Integrated
MAX146BCAP

MAX146BCAP - 12-Bit 8-Ch 133kSPS Serial ADC | Maxim Integrated

The Maxim Integrated MAX146BCAP is a +2.7V, low-power, 8-channel, 12-bit successive-approximation analog-to-digital converter (ADC) housed in a 20-pin SSOP package with a 133 kSPS sampling rate. According to the Analog Devices MAX146 datasheet, it integrates an 8-channel analog multiplexer, a high-bandwidth track/hold amplifier, and an internal 2.5V reference on-chip, and communicates through a SPI/QSPI/MICROWIRE-compatible serial interface. The device targets battery-powered and portable data-acquisition systems where low current draw and small footprint are critical. An ADC (Analog-to-Digital Converter) is a mixed-signal integrated circuit that quantizes a continuous-time analog input voltage into a discrete digital code. The MAX146 belongs to the successive-approximation register (SAR) ADC family, which trades raw speed for excellent DC accuracy and very low power consumption per conversion. In a typical signal chain (sensor -> amplifier -> ADC -> microcontroller), the ADC digitizes the conditioned analog signal so that a digital controller can process, log, or transmit the reading. MAX146-class devices sit between precision delta-sigma ADCs (slower, higher resolution) and high-speed flash ADCs (faster, lower resolution) on the performance-versus-speed spectrum, and they are widely used in industrial control, instrumentation, and embedded monitoring designs. Key features of the MAX146BCAP include 133 kSPS maximum sampling rate, an 8-channel single-ended or 4-channel differential input multiplexer, software-configurable unipolar/bipolar input ranges, an internal 2.5V reference with a ±1.5% buffer adjustment range, a hardware SHDN-bar pin plus software power-down that drops supply current to under 10 uA between conversions, and an automatic end-of-conversion shutdown mode for battery-aware applications. Operating supply range spans +2.7V to +3.6V on AVDD and +2.7V to DVDD +0.3V on DVDD, and the device is specified over the 0C to +70C temperature range in this CAP commercial-grade variant. Typical applications for the MAX146BCAP include portable data loggers, patient-monitoring and medical instruments, battery-powered sensor front ends, factory-automation signal conditioning, and embedded system analog I/O expansion for microcontrollers lacking an internal ADC. Its low-power operation and integrated multiplexer make it well-suited for multi-sensor monitoring in remote or wearable nodes. When designing with this device, use a clean analog ground plane and keep digital traces away from analog inputs; place the 10uF X7R bypass capacitor on AVDD as close to the pin as possible. The serial-interface SCLK should be kept under 2 MHz to preserve ADC linearity and avoid coupling digital noise into the analog input. Drive SHDN-bar high during normal operation and pull it low only between conversions to enter shutdown.

見積もり お問い合わせ
MAX147AEAP - 12-Bit 8-Ch SAR ADC, 133ksps, Serial | Maxim Integrated
MAX147AEAP

MAX147AEAP - 12-Bit 8-Ch SAR ADC, 133ksps, Serial | Maxim Integrated

The Maxim Integrated MAX147AEAP is a +2.7V, low-power, 8-channel, 12-bit successive-approximation analog-to-digital converter (SAR ADC) with a serial (SPI/QSPI/MICROWIRE-compatible) interface, supplied in a 20-pin SSOP package. It accepts single-ended inputs on 8 channels (or 4 differential inputs), samples at up to 133 ksps, and operates from a single +2.7V to +5.25V analog supply while the digital supply (VDD) tolerates +2.7V to +5.25V independently. The MAX147AEAP is the variant that requires an external reference voltage, whereas the closely related MAX146AEAP uses an internal 2.5V reference. What is a SAR ADC? A successive-approximation-register analog-to-digital converter is a precision data-conversion architecture that uses a comparator, a DAC, and a binary search register to converge on the input voltage one bit at a time over N conversion cycles. SAR ADCs sit in the precision-ADC family hierarchy between flash ADCs (fastest, lowest resolution) and sigma-delta ADCs (highest resolution, slowest), and are widely used in multiplexed data-acquisition front-ends, sensor arrays, and process-control I/O where mid-resolution, low-power, and deterministic latency matter most. Key features of the MAX147AEAP include a hardware SHDN (active-low shutdown) pin, software-selectable power-down between conversions, automatic end-of-conversion shutdown, an internal reference-buffer amplifier with ±1.5% voltage adjustment, and a serial interface that can be software-configured for unipolar/bipolar (0 to VREF or -VREF/2 to +VREF/2) operation. The 20-SSOP package keeps the part compact for high-channel-count boards. Architecturally, the device combines an input track-and-hold with a capacitive-charge redistribution DAC array and a precision comparator. The serial interface provides galvanic-isolation-friendly operation - the chip can be located adjacent to sensors while the host MCU is electrically isolated, ideal for medical, industrial, and process-control front-ends. Throughput scales with serial clock, and an external reference allows the user to trade off input range versus noise (e.g., 2.5V reference at 5.25V AVDD provides 12 bits of headroom with low LSB-weighted noise). Typical applications include portable instrumentation, multi-channel sensor readout (thermistors, RTDs, strain gauges), pen-digitizer and touchscreen front-ends, battery-powered data loggers, and 4-20 mA loop-powered process-control digitizers. The chip's low 1.2 mA supply current at full speed, falling to sub-microamp levels in shutdown, makes it well suited to solar- or battery-powered remote telemetry. A key design consideration is reference-decoupling: place a low-ESR 10 µF tantalum plus a 0.1 µF ceramic directly at REF with a short ground return. The input source impedance should be kept below ~1 kΩ so the track-and-hold can settle within the acquisition window at full throughput. This page synthesizes distributor inventory, parametric drop-in alternatives, and design notes not found in the manufacturer datasheet - useful for engineers evaluating second-source or pin-compatible replacements.

見積もり お問い合わせ
MAX147AEAP+TG05 - 12-Bit 8-Ch Serial ADC, SSOP-20 | Maxim
MAX147AEAP+TG05

MAX147AEAP+TG05 - 12-Bit 8-Ch Serial ADC, SSOP-20 | Maxim

The Analog Devices / Maxim Integrated MAX147AEAP+TG05 is a +2.7V, low-power, 8-channel, serial 12-bit analog-to-digital converter (ADC) in a 20-pin SSOP package with hard-wired SHDN pin and software-selectable power-down. Per the manufacturer datasheet the MAX147 operates from a single +2.7V to +3.6V supply, integrates an 8-channel analog multiplexer, a high-bandwidth track/hold amplifier, and a successive-approximation register (SAR) ADC that delivers up to 133 ksps conversion rate while drawing only 1.2 mA operating current. The suffix "TG05" denotes tape-and-reel packaging with a customer-specific lot code, while the MAX147 family itself uses the 20-pin SSOP pinout standard for the line. An SAR ADC is a successive-approximation analog-to-digital converter that performs a binary-search conversion against a precise internal DAC; SAR is favored over delta-sigma in low-latency, multi-channel data-acquisition systems because it samples the analog input on demand without requiring a continuous running modulator. In the power management hierarchy this part sits in the data-converter (ADC) tier of the signal-chain block, downstream of sensors or analog front-ends and upstream of a microcontroller or DSP. Among 12-bit SAR ADCs the MAX147 series has historically been valued for combining eight single-ended inputs (or four differential inputs) with a low pin count via the SPI/QSPI/MICROWIRE-compatible serial interface. Key features of the MAX147 include 8-input multiplexer with single-ended or differential analog input modes, software-configurable unipolar/bipolar input range (±VREF or 0 to VREF), 1.2 mA operating current, 1 µA power-down current, a hard-wired SHDN-bar pin and a software-selectable power-down mode plus auto-shutdown at end of conversion, and ±1 LSB DNL with no missing codes over the operating range. The internal +2.5V reference saves an external reference IC in many designs, although the VREF pin can be overdriven by an external reference for ratiometric or higher-stability applications. Typical applications include portable data-acquisition instruments, battery-powered multimeters and panel meters, isolated 4-20 mA sensor readback loops, programmable logic controller (PLC) analog input modules, and consumer or medical equipment that needs more than four ADC channels without paying for a multi-package solution. Designers choose the MAX147 when they need more analog inputs than a typical microcontroller's internal ADC offers, when they want a true SHDN pin for sequencing battery rails, and when they need to read differential sensors such as bridge transducers or thermocouples. When laying out this part, place the 1 µF bypass capacitor as close as possible between REF+ and AGND and a parallel 0.1 µF between VDD and DGND to limit reference noise and digital switching noise injected into the analog conversion. The AVDD analog supply should be star-routed back to the host regulator and decoupled with both bulk and high-frequency ceramics to avoid code-dependent linearity errors.

見積もり お問い合わせ
MAX147AEAP+TG068 - 12-Bit 8-Ch Serial ADC | Maxim Integrated
MAX147AEAP+TG068

MAX147AEAP+TG068 - 12-Bit 8-Ch Serial ADC | Maxim Integrated

The Maxim Integrated MAX147AEAP+TG068 (now under Analog Devices) is a 12-bit, low-power, 8-channel serial analog-to-digital converter (ADC) in a 20-pin SSOP package, supplied on tape-and-reel with the +TG068 customer-specific suffix. The device combines an 8-channel single-ended or 4-channel differential input multiplexer, a high-bandwidth track/hold, and a serial (SPI/QSPI/MICROWIRE-compatible) interface, sampling at up to 133 ksps while consuming only 1.5 mA at maximum throughput. A successive-approximation-register (SAR) ADC is a type of data converter that uses a binary search algorithm against an internal DAC to digitize an analog input in N clock cycles, where N is the resolution in bits. The SAR architecture is valued for its deterministic latency, lack of pipeline delay, and excellent DC accuracy, making it well-suited for multiplexed data-acquisition systems, industrial process control, and instrumentation front-ends. Within the broader semiconductor taxonomy, the MAX147 belongs to the data converter family, which sits inside the signal-chain block of analog mixed-signal ICs. Key features of the MAX147 include a single +2.7 V to +3.6 V supply operation (MAX147 variant), an internal 2.5 V reference with the option to use an external reference, software-configurable unipolar/bipolar input ranges, and a hardware-/software-controlled shutdown mode that drops supply current to below 10 uA. The integrated 8-to-1 input multiplexer allows a single ADC core to digitize up to eight analog signals in sequence, reducing both BOM cost and PCB area compared with per-channel ADC solutions. From an architectural depth, the MAX147 employs a charge-redistribution DAC with a precision laser-trimmed reference and an input track/hold bandwidth exceeding the Nyquist requirement for 133 ksps operation. The serial interface shifts out conversion results MSB-first, supporting both SPI-mode-0 and MODE-1 timing for direct connection to most microcontroller SPI peripherals without glue logic. Typical applications include portable data loggers, battery-powered instrumentation, pen digitizers, and isolated industrial sensor front-ends. Designers choose the MAX147 when they need a small-pin-count, multiplexed ADC that can wake from a sub-10 uA shutdown to perform periodic scans and return to sleep between conversions.

見積もり お問い合わせ