ADF4117BRU - 1.2GHz Integer-N RF PLL | Analog Devices
MPN: ADF4117BRU ✓ ActiveADF4117BRU Overview
A frequency synthesizer is an electronic timing and control component that produces an output frequency derived from a stable reference frequency. An integer-N PLL belongs to the integer-N frequency synthesizer family within clock and timing ICs. Its phase-frequency detector, charge pump, reference divider, A and B counters, and dual-modulus prescaler allow a receiver or transmitter to select an RF output frequency through digital programming.
The ADF4117BRU combines an input reference and programmable feedback path in a 1.2 GHz RF PLL. The verified distributor listing identifies the device as a single RF clock/frequency-synthesizer IC with one output in a 16-TSSOP package measuring 4.40 mm wide. The Analog Devices family data sheet describes low-noise digital phase-frequency detection, a precision charge pump, a programmable reference divider, programmable A and B counters, and a dual-modulus P/P+1 prescaler as the principal internal functional blocks.
The device is appropriate for RF signal chains requiring a programmable local oscillator. Its 1.2 GHz maximum indicated synthesizer frequency supports wireless receiver and transmitter architectures operating within that range. The integer-N architecture simplifies frequency planning because the prescaler, A counter, and B counter determine the synthesized output relationship to the reference and feedback signals.
Typical uses include wireless receiver downconversion, wireless transmitter upconversion, RF communications equipment, and other systems requiring an integrated programmable PLL. The 16-TSSOP package also allows reuse of compact RF board layouts designed for compatible members of the ADF411x family, provided the pin arrangement, frequency range, register behavior, and operating requirements are verified before substitution.
When designing around the ADF4117BRU, verify the complete reference and feedback network, counter programming, loop filter, charge-pump settings, and RF output routing against the manufacturer data sheet. Ensure the selected reference frequency and prescaler produce the intended channel-plan relationship without exceeding the device's stated operating limits.
This page combines the verified 1.2 GHz and 16-TSSOP identity, manufacturer family architecture, current production indication, distributor pricing reference, and same-package cross-reference information into a design-oriented resource for engineers evaluating the ADF4117BRU.
Drop-in alternatives for ADF4117BRU — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with ADF4117BRU (same form factor and footprint) — differing in A Counter, Package, B Counter, Charge Pump, Prescaler.
ADF4116BRU
✅ Drop-InContact for price
View Datasheet →ADF4107BRU
✅ Drop-InContact for price
View Datasheet →ADF4117BRU Specifications
| Product Type | RF clock/frequency synthesizer IC |
| PLL Architecture | Single, integer-N |
| Maximum Indicated Synthesizer Frequency | 1.2 GHz |
| Number of Outputs | 1 output |
| Phase-Frequency Detector | Low-noise digital PFD |
| Charge Pump | Precision charge pump |
| Reference Divider | Programmable |
| A Counter | Programmable |
| B Counter | Programmable |
| Prescaler | Dual-modulus P/P+1 |
| Package | 16-pin TSSOP |
| Package Width | 4.40 mm |
| Package Length | 0.173 inch |
| Mounting Type | Surface mount |
| Lifecycle Indication | Production |
| Datasheet Revision | Revision D |
ADF4117BRU 0.173 inch Pin Configuration Guide
Pin configuration for ADF4117BRU (0.173 inch package). Pin numbering, functions, and connection diagrams are defined in the manufacturer datasheet. Refer to it for the exact footprint and soldering guidelines.
No detailed pinout data available for ADF4117BRU.
Refer to the datasheet for full pin configuration.
Typical Applications
ADF4117BRU is suitable for 6 applications: Wireless Receiver Downconversion, Wireless Transmitter Upconversion, RF Communication Equipment, RF Test and Measurement Instrument, Frequency-Synthesizer Evaluation Platform, Instrumented Industrial RF System.
Wireless Receiver Downconversion
The ADF4117BRU fits a wireless receiver local-oscillator block because it is a programmable integer-N RF PLL with a verified maximum indicated synthesizer frequency of 1.2 GHz. Its reference divider, A and B counters, and dual-modulus P/P+1 prescaler establish the relationship among the reference, feedback, and RF output frequencies. Place the PLL in the receiver’s LO-generation section and use the manufacturer’s loop-filter and reference-design guidance to optimize phase noise and lock behavior. Confirm that the complete channel plan remains within the ADF4117’s documented counter, prescaler, reference, and output limits.
Recommended
Wireless Transmitter Upconversion
The ADF4117BRU can support programmable local-oscillator generation in wireless transmitter upconversion systems operating within the verified 1.2 GHz indicated range. Its integer-N counter architecture allows the channel frequency to be established through reference division, prescaling, and the programmable A and B counters. The 16-TSSOP package supports compact RF board construction, while the internal precision charge pump and low-noise digital phase-frequency detector form the basis of the PLL loop. Validate output power, spur, phase-noise, and loop-filter performance against the manufacturer reference design for the intended modulation and channel bandwidth.
Recommended
RF Communication Equipment
The ADF4117BRU is appropriate for RF communication equipment requiring an integrated, digitally programmable frequency source. Its verified 1.2 GHz positioning covers RF synthesis applications within that range, while the single-output configuration simplifies the relationship between one LO path and a transceiver channel. The programmable reference divider and dual-modulus prescaler provide the fundamental integer-N synthesis controls required to derive multiple channels from a stable reference. During design-in, verify reference input limits, counter ranges, lock-indicator behavior, supply requirements, and RF output performance against Revision D of the manufacturer family data sheet.
Recommended
RF Test and Measurement Instrument
The ADF4117BRU can serve as a programmable RF reference source inside test and measurement equipment that requires coherent local-oscillator generation. Its integer-N architecture permits channel selection through the reference divider, A and B counters, and dual-modulus prescaler, while the 1.2 GHz indicated frequency provides a defined upper operating point for design planning. The compact 16-TSSOP package allows placement close to RF circuitry, although trace routing, grounding, decoupling, and controlled-impedance implementation remain critical. Confirm synthesizer accuracy, output level, phase noise, and lock time using the manufacturer’s characterization data before laboratory use.
Recommended
Frequency-Synthesizer Evaluation Platform
The ADF4117BRU is suitable for an evaluation platform used to develop RF local-oscillator control software and channel plans. The family architecture exposes programmable reference division, A and B counters, and a dual-modulus prescaler, enabling firmware and loop-filter experiments around a common integer-N PLL. Its 16-TSSOP package makes it practical to prototype on a compact RF board and compare against adjacent Analog Devices family members. For reliable development, follow the manufacturer’s SPI register sequence, reference design, component values, and layout guidance rather than substituting unverified values from generic PLL examples.
Recommended
Instrumented Industrial RF System
The ADF4117BRU can support an instrumented industrial RF system that requires a programmable local oscillator for monitoring, alignment, or communications. The 1.2 GHz indicated frequency and single RF output provide a clear basis for initial architecture selection, while digital programmability supports repeatable channel selection. Industrial deployment requires additional verification of temperature range, supply tolerance, electromagnetic compatibility, and long-term availability because those exact limits are not present in the supplied snippets. The 16-TSSOP package should be placed on an RF-conscious PCB with controlled return paths and manufacturer-recommended component layout.
Recommended
Recommended Products Summary
Engineering reference data for ADF4117BRU — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | ADF4116BRU | ADF4107BRU |
|---|---|---|---|
| Package | 16-TSSOP | 16-TSSOP | 16-TSSOP |
| Brand | Analog Devices | Analog Devices | Analog Devices |
| Product Type | RF clock/frequency synthesizer IC | RF PLL frequency synthesizer | RF PLL frequency synthesizer |
Key Differentiators
- Documented 1.2 GHz positioning within the ADF411x family (vs ADF4116BRU)
- Direct support from a combined family data sheet (vs ADF4107BRU)
- Production status is explicitly identified (vs ADF4116BRU)
Design Notes
Use the Analog Devices ADF4116/4117/4118 family reference design and PCB guidance for the reference input, charge-pump loop filter, RF output, supply decoupling, and ground-return geometry. Keep the PLL loop-filter components and their grounding paths compact because long or asymmetric traces can add phase shift and degrade loop behavior. The exact reference-layout document and component values were not supplied in the verified excerpts and should be obtained from Analog Devices before layout release.
Do not assume that a 16-TSSOP footprint alone establishes drop-in compatibility. Verify every pin function, supply requirement, reference-input range, prescaler option, counter limit, register map, and initialization sequence against the current manufacturer documentation for ADF4116BRU or ADF4107BRU. The supplied evidence establishes same-package and same-family relationships but does not provide complete numerical equivalence, so an unqualified substitution could create lock, output-frequency, or programming errors.
Treat the reference and RF feedback paths as controlled-impedance signals rather than ordinary low-frequency interconnects. Route them away from noisy switching nodes, maintain continuous reference planes where practical, and minimize stub length. Use short, symmetric connections around the PLL and preserve the manufacturer-recommended ground return. The verified snippets identify a low-noise digital PFD and precision charge pump but do not provide phase-noise, spur, or output-level tables, so RF performance must be verified experimentally.
Compliance Information
The supplied verified snippets do not provide an exact-MPN compliance declaration. The Analog Devices product page confirms production status and Revision D documentation, but compliance claims require current manufacturer evidence.
