ADS805E/1KG4 - 12-Bit 20 MSPS ADC | Texas Instruments | 28-SSOP
MPN: ADS805E/1KG4 ✗ End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $11.42 | $11.42 |
| 10 | $10.28 | $102.80 |
| 100 | $9.07 | $907.00 |
| 500 | $7.86 | $3,930.00 |
| 1,000 | $6.94 | $6,940.00 |
ADS805E/1KG4 Overview
An ADC (Analog-to-Digital Converter) is a data-acquisition integrated circuit that samples continuous analog signals and converts each sample into a discrete digital code. Within the power-management and signal-chain taxonomy, the ADS805 belongs to the SAR/pipelined ADC family, the data-converter category, and the broader mixed-signal semiconductor hierarchy. Pipelined ADCs trade slightly higher latency (typically 3-5 clock cycles) for much higher sampling rates than successive-approximation (SAR) architectures, making them ideal for continuous-stream applications above 5 MSPS.
Key features include 12-bit resolution with no missing codes, 20 MSPS maximum sampling rate, internal or external reference operation, an out-of-range indicator flag, single +5V supply operation, and a flexible parallel digital interface. The differential input stage is designed for ease of drive with a single op-amp in most configurations. The 2 Vp-p input range is the easiest to drive with a single op amp and provides the best spurious performance, while the 5 Vp-p range maximises dynamic range in low-noise front ends.
The ADS805E uses a multi-stage pipelined architecture with proprietary error correction to achieve low differential non-linearity (DNL) and integral non-linearity (INL). The pin-compatible ADS804 (10 MSPS) and ADS803 (5 MSPS) allow designers to scale performance without PCB layout changes. The internal reference is laser-trimmed, and the part supports both CMOS-compatible and low-voltage differential outputs depending on configuration.
Typical applications include digital video broadcast equipment, CCD-based imaging systems, document scanners, baseband I/Q sampling in software-defined radio, portable instrumentation, and industrial process control front ends. The combination of 5V single-supply operation and small 28-SSOP footprint suits space-constrained designs that require higher dynamic range than 8/10-bit alternatives.
When designing with this device, ensure the analog input is properly buffered with a wideband op-amp capable of settling within half a clock cycle. The internal reference requires a stable bypass capacitor on the REFT/REFB pins; inadequate decoupling can degrade SNR by 1-2 dB. Power-supply rejection must be considered if the 5V rail is shared with switching converters.
Drop-in alternatives for ADS805E/1KG4 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with ADS805E/1KG4 (same form factor and footprint) — differing in Operating Temperature, Package, Reference, Resolution, RoHS Status.
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View Datasheet →ADS805E/1K
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ADS804E/1K
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ADS805E/1KG4 Maximum Ratings & Electrical Characteristics
| Resolution | 12 bits |
| Sampling Rate | 20 MSPS |
| Number of Input Channels | 1 |
| Architecture | Pipelined |
| Input Range | 2 Vp-p to 5 Vp-p (programmable) |
| Analog Supply Voltage | 5 V single supply |
| Reference | Internal or external |
| Data Interface | Parallel |
| Package | 28-SSOP (5.30 mm width) |
| Operating Temperature | -40 C to +85 C (industrial) |
| Terminal Form | Gull Wing |
| Package Code | SSOP |
| Package Shape | Rectangular |
| Pin Count | 28 |
| Packaging | Tape & Reel (TR) |
| Out-of-Range Indicator | Yes |
| RoHS Status | Compliant |
ADS805E/1KG4 Pin Configuration
| Pin 1 | DVDD — Digital supply voltage (5V) |
| Pin 2 | DGND — Digital ground |
| Pin 3 | D0 — Data output bit 0 (LSB) |
| Pin 4 | D1 — Data output bit 1 |
| Pin 5 | D2 — Data output bit 2 |
| Pin 6 | D3 — Data output bit 3 |
| Pin 7 | D4 — Data output bit 4 |
| Pin 8 | D5 — Data output bit 5 |
| Pin 9 | D6 — Data output bit 6 |
| Pin 10 | D7 — Data output bit 7 |
| Pin 11 | D8 — Data output bit 8 |
| Pin 12 | D9 — Data output bit 9 |
| Pin 13 | D10 — Data output bit 10 |
| Pin 14 | D11 — Data output bit 11 (MSB) |
| Pin 15 | OTR — Out-of-range indicator (active high) |
| Pin 16 | NC — Not connected (per datasheet) |
| Pin 17 | AVDD — Analog supply voltage (5V) |
| Pin 18 | AGND — Analog ground |
| Pin 19 | REFT — Top reference decoupling |
| Pin 20 | REFB — Bottom reference decoupling |
| Pin 21 | REFIN — External reference input (or internal bypass) |
| Pin 22 | AIN — Analog input |
| Pin 23 | NC — Not connected (per datasheet) |
| Pin 24 | CLK — Conversion clock input |
| Pin 25 | NC — Not connected (per datasheet) |
| Pin 26 | OE — Output enable (active low) |
| Pin 27 | STBY — Standby mode (active low) |
| Pin 28 | NC — Not connected (per datasheet) |
Typical Applications
ADS805E/1KG4 is suitable for 7 applications: CCD Imaging Front End, Digital Video Broadcast Equipment, Baseband I/Q Sampling in Software-Defined Radio, Portable Test and Measurement Instrumentation, Industrial Process Control Front End, Medical Ultrasound Beamformer (Legacy Systems), Document Scanner / Digitiser.
CCD Imaging Front End
The ADS805E/1KG4's 20 MSPS sampling rate and 12-bit resolution are well matched to digitising the output of line-scan and area-scan CCD arrays used in industrial inspection and document scanners. The 5 Vp-p input range can directly accept the typical CCD output swing without an additional programmable-gain amplifier, simplifying the analog front end. Its pipelined architecture provides the throughput needed for full-resolution digitisation at common CCD pixel clock rates up to 20 MHz. The internal reference option reduces external component count in space-constrained camera modules. Engineers should buffer the CCD output with a low-noise wideband op-amp such as the OPA355 to preserve SNR at the ADC input.
Recommended
Digital Video Broadcast Equipment
The ADS805E/1KG4 is widely used in digital video broadcast (DVB) and professional video equipment where 12-bit component digitisation at 20 MSPS provides the oversampling margin required for high-quality video reconstruction. Its 5V single-supply operation simplifies power-tree design, and the parallel CMOS output interface connects directly to video processing ASICs and FPGAs. The pipelined architecture maintains low-latency throughput essential for video frame buffers. For component-video and SDI applications, the 12-bit dynamic range captures the full broadcast-spec video levels. Designers should use the internal reference mode and add REFT/REFB bypass capacitors of at least 10 uF ceramic for stable operation.
Recommended
Baseband I/Q Sampling in Software-Defined Radio
The ADS805E/1KG4 is suitable for baseband I/Q sampling in narrowband software-defined radio receivers where the intermediate-frequency signal bandwidth is below 10 MHz. The 20 MSPS sampling rate provides 2x oversampling at baseband, allowing simple digital anti-alias filtering and reducing analog filter complexity. Two ADS805E devices can be used in parallel for I and Q channel digitisation, sharing a common clock from a TCXO or PLL. The 12-bit resolution yields approximately 70 dB SFDR, sufficient for many narrowband demodulation schemes. The 5V supply simplifies integration with mainstream analog RF front ends. For higher dynamic range, consider the AD9226 from Analog Devices as an upgrade path.
Recommended
Portable Test and Measurement Instrumentation
The ADS805E/1KG4 fits mid-range portable oscilloscope and data-logger designs requiring 12-bit vertical resolution at 20 MSPS. Its single 5V supply operation enables battery-powered designs, and the small 28-SSOP footprint suits handheld form factors. The internal reference option eliminates the need for an external reference IC, reducing BOM cost and board area. The pipelined architecture provides the sustained throughput needed for real-time waveform capture and streaming to memory. The pin-compatible ADS804 (10 MSPS) and ADS803 (5 MSPS) allow product-line scaling from low-end to high-end models using a single PCB layout. Engineers should add 0.1 uF bypass capacitors on every supply pin for clean digitisation.
Recommended
Industrial Process Control Front End
The ADS805E/1KG4 is well suited to industrial process control front ends digitising 4-20 mA loop signals, thermocouple outputs, and strain-gauge bridges after instrumentation-amp conditioning. The 12-bit resolution provides approximately 0.024% full-scale resolution, sufficient for many industrial measurement applications. The -40 C to +85 C industrial temperature range supports factory-floor deployments, and the 28-SSOP package handles moderate thermal loads in sealed enclosures. The internal reference and 5V single-supply operation simplify isolated power designs when paired with DC-DC converters such as the DCP010505. For higher-precision applications, upgrade to the 16-bit ADS1110 or ADS1220 from Texas Instruments.
Recommended
Medical Ultrasound Beamformer (Legacy Systems)
The ADS805E/1KG4 appears in legacy medical ultrasound beamformer designs where 12-bit resolution at 20 MSPS is adequate for low-frequency imaging channels. Multiple ADS805E devices operate in parallel, each digitising one channel of the phased-array transducer output, and the parallel digital interface feeds directly into the beamformer FPGA. The 5V single-supply operation simplifies the multi-channel power tree. The 28-SSOP footprint allows high-density board layouts with channel counts up to 64 or 128. Modern replacements for new designs include the AD9226 (12-bit 65 MSPS) or AD9271 (octal LNA/VGA/AAF/ADC) from Analog Devices with integrated front-end functions.
Recommended
Document Scanner / Digitiser
The ADS805E/1KG4 is commonly deployed in production-line document scanners and archival digitisation equipment where 12-bit grayscale resolution at 20 MSPS captures the full tonal range of printed and handwritten originals. The pipelined architecture sustains continuous line-by-line digitisation at scanner transport speeds, and the parallel output interface connects directly to image-processing ASICs. The internal reference reduces calibration drift over the scanner's lifetime, important for archival-quality reproduction. The 28-SSOP package enables compact scan-head designs. Designers should select the 5 Vp-p input range to maximise SNR for grayscale reproduction, and add dithering from a small noise source if low-level quantisation artefacts appear.
Recommended
Recommended Products Summary
Engineering reference data for ADS805E/1KG4 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | ADS804E/1KG4 | ADS803E/1KG4 | ADS805E/1K | ADS805E |
|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | 28-SSOP | 28-SSOP - same | 28-SSOP - same | 28-SSOP - same | 28-SSOP - same |
| Resolution | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits |
| Sampling Rate | 20 MSPS | 10 MSPS (-50%) | 5 MSPS (-75%) | 20 MSPS (same) | 20 MSPS (same) |
| Input Range | 2-5 Vp-p | 2-5 Vp-p | 2-5 Vp-p | 2-5 Vp-p | 2-5 Vp-p |
| Architecture | Pipelined | Pipelined | Pipelined | Pipelined | Pipelined |
| Supply Voltage | 5 V single | 5 V single | 5 V single | 5 V single | 5 V single |
| Reference | Internal or external | Internal or external | Internal or external | Internal or external | Internal or external |
| Operating Temperature | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
| Lifecycle Status | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete |
Key Differentiators
- Highest sampling rate in the ADS80x family (vs ADS804E/1KG4)
- Pin-compatible with slower ADS804 and ADS803 variants (vs ADS803E/1KG4)
- Wide input voltage range with single 5V supply (vs ADS805E/1K)
Design Notes
Place a 0.1 uF ceramic bypass capacitor within 5 mm of every AVDD and DVDD pin, and add a 10 uF tantalum or ceramic bulk capacitor at the supply entry point. The AGND and DGND pins should connect to a common ground plane via a single-point connection under the IC to avoid digital return currents coupling into the analog ground. Route the CLK trace as a 50-ohm controlled-impedance line and keep it short to minimise jitter. The REFT and REFB pins each require a low-ESR ceramic bypass capacitor of at least 10 uF directly at the pin for stable reference operation and best SNR.
Drive the analog input AIN with a low-impedance, wideband op-amp such as the OPA355 or THS4631, configured for the selected 2 Vp-p or 5 Vp-p input range. The input bandwidth of the driver must exceed 100 MHz to preserve 12-bit settling within the ADC acquisition window. Source impedance above 50 ohms degrades THD; keep the driver's output impedance below 5 ohms at the ADC's sample rate. Use a small series resistor (10-33 ohms) between the driver and AIN to dampen the input kick from the ADC's switched-capacitor sampling network.
Avoid using the internal reference mode without adequate REFT/REFB bypassing; insufficient decoupling can degrade SNR by 1-2 dB. Do not exceed the 5V analog supply rating or allow supply transients above 6V during power-up. When using external clock mode, ensure CLK meets the minimum 20 ns high and 20 ns low times; jitter above 5 ps p-p will degrade SNR. The OTR (Out-of-Range) pin must be monitored in safety-critical applications, as it indicates when the analog input has exceeded the selected full-scale range. The /1KG4 suffix denotes green (RoHS) lead-free packaging - do not exceed 260 C peak reflow temperature for longer than 30 seconds.
Compliance Information
RoHS compliant per TI product page. The /G4 suffix in /1KG4 indicates green (RoHS) lead-free packaging. Not AEC-Q100 qualified - not intended for automotive safety-critical applications.