ATNGW100 - AVR32 AP7000 Network Gateway Eval Board | Microchip
MPN: ATNGW100 β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $0 | $0.00 |
| 10 | $0 | $0.00 |
| 100 | $0 | $0.00 |
| 500 | $0 | $0.00 |
| 1,000 | $0 | $0.00 |
ATNGW100 Overview
An embedded evaluation board is a printed circuit assembly that exposes the key peripherals of a target microcontroller or microprocessor so engineers can prototype firmware, drivers, and complete applications before committing to custom hardware. Evaluation boards sit at the top of the embedded development hierarchy: semiconductor -> MCU/MPU -> development kit -> application firmware. They typically integrate power regulation, clocking, debug connectors, memory, and network or USB interfaces.
Key features of the ATNGW100 include the high-performance AVR32 AP7000 core, integrated build scripts for the toolchain, Linux kernel, boot loader, libraries, and applications, and a configuration system that is easily adaptable to custom boards. Because Linux and the complete toolchain are bundled, teams can move from unboxing to running an embedded Linux network gateway without lengthy host setup.
Architecturally, the AP7000 family is a 32-bit AVR32 RISC processor designed by Atmel (now Microchip) for high-throughput embedded control and networking. The ATNGW100 board demonstrates this processor in a network gateway role, where its peripheral set and Linux support enable routing, bridging, and protocol-conversion workloads. The supplied build scripts produce reproducible, optimized system images that can be trimmed for production targets.
Typical applications include embedded Linux gateway prototyping, AVR32 AP7000 firmware evaluation, industrial network bridge development, and academic embedded-systems teaching labs that need a complete Linux-capable platform.
Design consideration: treat the ATNGW100 as a development platform, not a production module. When migrating to custom hardware, reuse the board files and build-script outputs, then verify boot-loader and kernel configuration against your own memory map and peripheral usage.
This page synthesizes distributor availability, verified specification excerpts, and practical selection guidance for the ATNGW100 that is not consolidated on any single manufacturer or distributor page.
Drop-in alternatives for ATNGW100 β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
ATNGW100-ND
β Drop-Inπ Reference alternative (not in catalog)
ATNGW100 Specifications (manufacturer-published)
| Product Type | Embedded MCU/MPU Evaluation Board |
| Target Processor | AT32AP7000, AT32AP7001, AT32AP7002 |
| Core Architecture | AVR32 32-bit RISC |
| Board Role | Network Gateway / Evaluation |
| Supported Software | Linux OS, Dev and Debug Toolchain |
| Kit Contents | Board and Linux development/debug toolchain |
| Build System | Integrated build scripts for toolchain, Linux kernel, boot loader, libraries, applications |
| Board Customization | Configurable and optimized, easily adaptable to custom boards |
| For Use With/Related Products | AT32AP7000, AT32AP7001, AT32AP7002 |
| Manufacturer Family | AVR (AVR32) |
| RoHS Status | RoHS Compliant |
| Lead Free Status | Lead Free |
| Brand (Legacy) | ATMEL (now Microchip Technology) |
| Mounting Style | Standalone development kit |
| Primary Use Case | Embedded Linux network gateway prototyping |
ATNGW100 Interfaces & Connectors
No manufacturer-published interface list is available for ATNGW100. Refer to the manufacturer documentation for connector and header details.
Refer to the manufacturer documentation for the full expansion header pinout and connector pin numbering.
Typical Applications
ATNGW100 is suitable for 6 applications: Embedded Linux Network Gateway Prototyping, AVR32 AP7000 Firmware and Driver Evaluation, Industrial Network Bridge Development, Embedded Systems Education and Labs, Custom Board Pre-Development Validation, IoT Edge Device Proof of Concept.
Embedded Linux Network Gateway Prototyping
The ATNGW100's primary purpose is prototyping network gateway products on the AVR32 AP7000 processor family. Because the kit bundles a Linux development and debug toolchain with integrated build scripts for the kernel, boot loader, libraries, and applications, an engineer can boot a working Linux system within hours of unboxing. The AP7000's peripheral set supports Ethernet and serial connectivity needed for routing and protocol conversion workloads. The build system is configurable and optimized, so images can be trimmed for gateway-specific functionality. Performance consideration: the AVR32 core suits moderate-throughput gateway tasks; for line-rate routing, benchmark packet forwarding early in the project.
Recommended
AVR32 AP7000 Firmware and Driver Evaluation
Teams maintaining or designing products around AT32AP7000, AT32AP7001, or AT32AP7002 silicon use the ATNGW100 as the sanctioned hardware reference. It allows validation of peripheral drivers, boot-loader behavior, and power-up sequencing before custom PCBs exist. The board's role as the manufacturer's network gateway reference means datasheet-level assumptions (clock configuration, memory map) are already proven. Engineers can port validated build scripts directly to custom hardware, per the datasheet's note that the system is easily adaptable to custom boards. Consideration: register-level differences between AP7000 variants should be confirmed against each device datasheet during driver work.
Recommended
Industrial Network Bridge Development
Industrial automation frequently requires protocol bridges between field buses and Ethernet backbones. The ATNGW100 provides a Linux-capable platform where protocol stacks (Modbus, custom serial bridges) can be developed with full OS services. The AVR32 AP7000 processor delivers deterministic embedded performance while Linux handles networking complexity, an architecture proven in gateway-class products. Integrated build scripts keep the protocol stack, kernel, and boot loader version-controlled and reproducible, which matters for industrial change management. Design consideration: validate EMC and isolation requirements separately, as the evaluation board is not designed for direct installation in industrial panels.
Recommended
Embedded Systems Education and Labs
Universities and training programs use the ATNGW100 to teach embedded Linux because it removes host-setup friction: the kit ships with the complete Linux development and debug toolchain, including build scripts for toolchain, kernel, boot loader, libraries, and applications. Students interact with every layer of the embedded stack - from U-Boot-style boot loaders through kernel configuration to user-space applications - on one coherent, documented platform. The AVR32 architecture is simple enough for instruction while remaining a real 32-bit RISC design. Consideration: courses should archive toolchain versions, as legacy AVR32 toolchain availability may change over time.
Recommended
Custom Board Pre-Development Validation
Before committing to a custom AT32AP7000 PCB, hardware teams use the ATNGW100 to de-risk the design: confirming memory configuration, boot flow, peripheral usage, and power budgets on proven hardware. The datasheet explicitly states the build system is configurable, optimized, and easily adoptable to custom boards, meaning the validated software baseline transfers with minimal rework. This shortens custom-board bring-up from weeks to days because kernel and boot-loader configuration errors are eliminated as a variable. Performance consideration: replicate critical timing measurements on the evaluation board first, then re-verify on custom hardware.
Recommended
IoT Edge Device Proof of Concept
For IoT edge nodes that need an operating system - data aggregation, local protocol translation, or security processing - the ATNGW100 offers a complete Linux-capable proof-of-concept platform on AVR32 silicon. Developers implement application logic with standard Linux networking tools while validating the processor family's suitability for the final product. The bundled toolchain with integrated build scripts supports iterative firmware delivery, and the board's gateway orientation matches typical edge-node connectivity requirements. Consideration: for power-constrained IoT deployments, measure real sleep-current behavior on the board, then validate against final hardware, as evaluation-board peripherals add overhead.
Recommended
Recommended Products Summary
Engineering reference data for ATNGW100 β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | ATNGW100-ND (DigiKey SKU) |
|---|---|---|
| Package | Development kit (evaluation board) | Development kit (evaluation board) - same |
| Brand | Microchip Technology (legacy Atmel) | Microchip Technology - same |
| Target Processor | AT32AP7000 / AT32AP7001 / AT32AP7002 | AT32AP7000 / AT32AP7001 / AT32AP7002 - same |
| Core Architecture | AVR32 32-bit RISC | AVR32 32-bit RISC - same |
| OS / Toolchain Included | Linux dev and debug toolchain | Linux dev and debug toolchain - same |
| RoHS Status | RoHS Compliant | RoHS Compliant - same |
| Lead Free Status | Lead Free | Lead Free - same |
Key Differentiators
- Complete Linux toolchain bundled in the kit (vs Generic ARM eval boards)
- Direct AP7000-family reference design status (vs Third-party AVR32 boards)
- Trade-off: legacy AVR32 architecture (vs Modern Cortex-A boards)
Design Notes
Treat the ATNGW100 as a development platform only. Do not deploy the evaluation board in end products: it lacks production-grade EMC hardening, conformal coating, and long-term supply commitment. Instead, use it to validate the AT32AP7000 software baseline (boot loader, kernel, applications) and then port the build scripts - which the datasheet states are configurable, optimized, and easily adapted to custom boards - to your own hardware. Confirm AT32AP7000 lifecycle status with Microchip before starting a new production design.
Verify the board's power supply requirements against the official ATNGW100 user guide before first power-up; the supplied wall adapter or USB power path must match the board revision. When designing a custom AP7000 board based on this reference, budget for the processor's core and I/O rail sequencing and replicate the reference regulator topology. Estimated: total board power depends on Ethernet activity and clock configuration, so measure on the evaluation board under your expected workload before sizing regulators.
When migrating from the ATNGW100 to custom hardware, mirror the reference design's memory routing and crystal placement closely; AVR32 AP7000 bus timing is sensitive to trace length mismatches on SDRAM interfaces. Use the evaluation board as the golden layout reference for clock distribution and decoupling. Preserve test points for boot-loader recovery (JTAG/serial) since bricked boot loaders on custom AP7000 boards are difficult to recover without in-circuit debug access.
Compliance Information
RoHS Compliant and Lead Free per ATNGW100 datasheet specifications (digchip.com datasheet excerpt). REACH, halogen-free, and conflict-minerals status not stated in provided data.
