CS5012A-BL7Z - 12-bit 100kSPS Self-Calibrating SAR ADC | Cirrus Logic
MPN: CS5012A-BL7Z ✗ End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $18.5 | $18.50 |
| 10 | $16.25 | $162.50 |
| 100 | $13.9 | $1,390.00 |
| 500 | $11.85 | $5,925.00 |
| 1,000 | $10.4 | $10,400.00 |
CS5012A-BL7Z Overview
A successive-approximation register (SAR) ADC is a sampling data converter that resolves each bit of the output code in a single clock cycle by switching an internal binary-weighted capacitor DAC against the input voltage through a comparator. This topology combines moderate speed with deterministic latency, very low power consumption, and the absence of pipeline delay, which is why SAR converters dominate precision industrial, instrumentation, and medical signal-chain designs. The CS5012A family builds on this principle with a self-calibration routine that keeps offset and full-scale error within 1/2 LSB and guarantees no missing codes at the 12-bit level.
Key specifications include 12-bit resolution, 100 kSPS maximum throughput, a single 5 V analog supply (per family datasheet), unipolar/bipolar input ranges, and 16-/14-/12-bit pin-compatible variants (CS5016/14/12A). The CS5012A-BL7Z sub-version additionally exposes a serial interface option, allowing the same die to be used in low-pin-count microcontroller or DSP front ends. Internal calibration runs automatically on demand, removing the manual trim step that older SAR parts required at production.
Architecturally the converter integrates a fast-slewing on-chip track-and-hold buffer, so the input signal is re-acquired immediately after each conversion. This architecture permits true 100 kSPS throughput without an external buffer amplifier. The 3-state outputs and a single-chip wait/busy handshake make the part drop-in friendly for legacy 8051, 68HC11, and DSP host designs.
Typical applications include precision industrial process control loops, weigh-scale and load-cell digitizers, multi-channel data-acquisition front ends, audio-bandwidth instrumentation, portable medical instrumentation, and legacy 12-bit upgrade paths in motor control and power metering where CS5012A-BL7Z is already on the BOM.
When laying out a board, treat the AVCC/AGND pair as a star: place a 10 uF tantalum plus 0.1 uF ceramic directly at the analog supply pin, and route the analog input trace away from the digital outputs to avoid coupling. The self-calibration routine assumes the supply is settled; power up, wait 50 ms, then issue CAL before the first conversion for published linearity.
This page synthesizes live distributor inventory, parametric drop-in alternatives, and PCB-level design notes that are not duplicated in the manufacturer datasheet.
Drop-in alternatives for CS5012A-BL7Z — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
CS5014-BL14Z
✅ Drop-In📋 Reference alternative (not in catalog)
CS5016-BL16Z
✅ Drop-In📋 Reference alternative (not in catalog)
CS5012A-BL7
✅ Drop-In📋 Reference alternative (not in catalog)
CS5014-BL14
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CS5012A-BL7Z Maximum Ratings & Electrical Characteristics
| Resolution | 12 bits |
| Conversion Time | 7.2 us |
| Throughput | 100 kSPS |
| Architecture | SAR (Successive Approximation) with self-calibration |
| Number of Channels | 1 |
| Input Range | Unipolar and bipolar (per family datasheet) |
| Interface | Parallel (word access) or serial (BL7Z variant) |
| Differential Nonlinearity (DNL) | Guaranteed no missing codes |
| Offset Error (post-cal) | 1/2 LSB max (CS5012A) |
| Full-Scale Error (post-cal) | 1/2 LSB max (CS5012A) |
| Track-and-Hold | On-chip, fast-slewing input buffer |
| Package | 44-pin PLCC (16.59 x 16.59 mm) |
| Mounting Type | Surface Mount |
CS5012A-BL7Z 44-pin plcc (16.59 x 16.59 mm) Pin Configuration Guide
Pin configuration for CS5012A-BL7Z (44-pin plcc (16.59 x 16.59 mm) package). This analog component features input, output, and power supply pins. Refer to the manufacturer datasheet for offset null, compensation, and enable pin configurations. Ideal for signal conditioning and amplifier circuits.
No detailed pinout data available for CS5012A-BL7Z.
Refer to the datasheet for full pin configuration.
Typical Applications
CS5012A-BL7Z is suitable for 6 applications: Precision Industrial Process Control, Weigh-Scale and Load-Cell Digitizer, Multi-Channel Data Acquisition Front End, Audio-Bandwidth Instrumentation, Portable Medical Instrumentation, Legacy 12-bit Upgrade Path in Motor Control.
Precision Industrial Process Control
The CS5012A-BL7Z fits industrial process-control loops because its 12-bit/100 kSPS throughput delivers 5 kHz of input bandwidth per channel, comfortably oversampling 4-20 mA loops and RTD/thermocouple front ends. The on-chip self-calibration routine holds offset and full-scale error to 1/2 LSB without a service technician, satisfying the long-term drift budgets of PLC analog input cards. Designers typically place the converter behind an instrumentation amp (e.g. AD8421) and feed its 5 V supply from a linear LDO rather than a switching rail, because the converter's PSRR cannot fully reject MHz-class switch noise. Result: better than 0.1 percent FS accuracy in a plant-floor DIN-rail module.
Recommended
Weigh-Scale and Load-Cell Digitizer
The CS5012A-BL7Z is well-matched to load-cell digitizers because its 7.2 us conversion time and integrated track-and-hold can digitize the slowly varying bridge output at 100 kSPS while averaging down noise to 16-bit effective resolution. Its differential linearity guarantee of 'no missing codes' prevents the histogram gaps that would otherwise produce scale non-linearities in retail and laboratory balances. The 44-PLCC package keeps the analog ground plane compact under the die, simplifying the 4-layer PCB stack that most load-cell modules require for EMI. Combined with a CS5503 or CS5516 sigma-delta companion, it forms a hybrid speed/precision front end.
Recommended
Multi-Channel Data Acquisition Front End
The CS5012A-BL7Z is a strong fit for legacy multi-channel 12-bit DAQ front ends where one ADC is multiplexed across 8-16 analog inputs at 100 kSPS aggregate. Its fast on-chip track-and-hold eliminates the external buffer that older successive-approximation parts required, shrinking the BOM by an op-amp and a settling RC. The 3-state parallel bus simplifies interface to legacy 8051/68HC11/DSP hosts, while the BL7Z variant's serial mode lets modern microcontrollers read conversions without dedicating a full port. Designers often pair it with an ADG708 8-to-1 mux and an AD584 precision reference for a complete 12-bit DAQ slice.
Recommended
Audio-Bandwidth Instrumentation
The CS5012A-BL7Z's 100 kSPS rate covers the full 20 Hz-20 kHz audio band and beyond, making it suitable for audio-bandwidth test instruments, signal analyzers, and acoustical measurement front ends. Its 12-bit resolution is sufficient for analyzers with 70 dB dynamic range and for sound-level meter front ends after anti-alias filtering. The serial BL7Z interface drops into DSP evaluation boards without glue logic, reducing design time for prototype audio analyzers. Engineers typically drive the input through an audio-bandwidth amp such as the SSM2017 and use an anti-alias filter with fc near 40 kHz before the ADC input pin.
Recommended
Portable Medical Instrumentation
The CS5012A-BL7Z fits portable medical instruments such as pulse oximeters, single-channel ECG front ends, and patient monitors where 12-bit resolution at 100 kSPS provides ample dynamic range for biopotential signals after front-end gain. The on-chip self-calibration eliminates per-unit trim during manufacturing, which is a major cost saver in low-volume medical device production. The 44-PLCC package is mechanically robust for through-hole-style lead forming often used in medical carts and bedside monitors. Designers follow IEC 60601-1 isolation requirements by placing an ISO amp (e.g. ADuM3150) on the digital bus side.
Recommended
Legacy 12-bit Upgrade Path in Motor Control
The CS5012A-BL7Z is frequently specified in existing motor-control designs for current sensing on inverter phase legs, where 12-bit resolution and 100 kSPS capture 20 kHz PWM current transients adequately for FOC control loops. Engineers keep the BL7Z variant on the BOM because its pin-compatible 14-bit and 16-bit siblings (CS5014/16) allow in-place resolution upgrades without board re-spin when a higher-performance drive variant is needed. Layout practice places the ADC's AGND star-point under pin 1 of the PLCC, isolated from the gate-driver ground return, to preserve the 1/2 LSB linearity under switching noise.
Recommended
Recommended Products Summary
Engineering reference data for CS5012A-BL7Z — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | CS5014-BL14Z | CS5016-BL16Z | CS5012A-BL7 |
|---|---|---|---|---|
| Brand | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic |
| Package | 44-PLCC | 44-PLCC - same | 44-PLCC - same | 44-PLCC - same |
| Resolution | 12 bits | 14 bits | 16 bits | 12 bits |
| Conversion Time | 7.2 us | 14.25 us | 16.25 us | 7.2 us |
| Throughput | 100 kSPS | 70 kSPS | 62 kSPS | 100 kSPS |
| Architecture | SAR + self-cal | SAR + self-cal | SAR + self-cal | SAR + self-cal |
| Channels | 1 | 1 | 1 | 1 |
| Interface | Serial/parallel (BL7Z) | Serial/parallel | Serial/parallel | Parallel (legacy packing) |
| Lifecycle | NRND | NRND | NRND | Obsolete (legacy SnPb) |
Key Differentiators
- Pin-compatible upgrade path to 14-bit and 16-bit (vs CS5012A-BL7 (legacy SnPb))
- On-chip self-calibration (vs Generic 12-bit SAR (e.g. ADuC7060 family))
- Integrated track-and-hold (vs External sample-and-hold requirement of older SARs)
Design Notes
Decouple the analog supply pin of the CS5012A-BL7Z with a 10 uF tantalum in parallel with a 0.1 uF ceramic placed within 5 mm of the AVCC pin; route AVCC from a star-point separate from the digital 5 V rail. The on-chip calibration routine assumes a settled supply - allow at least 50 ms after power-up before issuing CAL, or linearity will degrade.
Treat AGND and DGND as separate nets joined at a single point under pin 1 of the PLCC; never run digital return currents under the analog ground pour. Keep the analog input trace short and guarded, and place a 100 ohm series resistor at the analog input pin to damp the on-chip track-and-hold kickback, which is essential to preserve the 1/2 LSB linearity budget above 50 kSPS.
Do not assume the CS5012A-BL7Z is pin-compatible with the CS5101A-BL8Z or CS5102A-BLZ: those parts use a 28-PLCC, not 44-PLCC, and substituting them requires PCB rework. Also note that the BL7Z suffix indicates lead-free packing - do not mix BL7Z and BL7 in the same panel if your line is process-sensitive to lead-free vs SnPb solder profiles.
Compliance Information
BL7Z suffix denotes lead-free packing per Cirrus Logic part-numbering convention. RoHS and REACH inferred from distributor listings; halogen-free status not published.
