DSPIC30F5013T-30I/PT - 30 MIPS 16-bit DSC, 66KB Flash | Microchip
MPN: DSPIC30F5013T-30I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $6.49 | $6.49 |
| 10 | $5.84 | $58.40 |
| 100 | $5.21 | $521.00 |
| 500 | $4.62 | $2,310.00 |
| 1,000 | $4.1 | $4,100.00 |
DSPIC30F5013T-30I/PT Overview
A Digital Signal Controller (DSC) is a hybrid between a microcontroller (MCU) and a digital signal processor (DSP). The dsPIC30F core combines a deterministic modified Harvard MCU architecture with single-cycle MAC and barrel shifter DSP instructions, enabling real-time control loops and high-throughput signal processing on a single chip. In the broader taxonomy it belongs to: dsPIC -> DSC -> MCU -> embedded processor -> semiconductor IC. The '30I' suffix denotes the -40C to +85C industrial temperature range, and the '/PT' suffix indicates the 80-pin TQFP package supplied on Tape & Reel.
Key features include 30 MIPS operation from a 2.5V to 5.5V supply, two 10-bit A/D converters (up to 16 channels), two 10-bit D/A converters, two UART modules, two SPI ports, one I2C bus, two CAN modules, two capture inputs, six PWM/compare outputs, two quadrature encoder interfaces, and a 16-bit timer. The integrated DSP engine supports fractional and integer arithmetic with deterministic interrupt latency, making the device well suited to closed-loop control.
Typical applications include three-phase AC induction motor control, sensorless BLDC commutation, UPS and PFC boost power factor correction, digital audio processing, and industrial sensor conditioning. The combination of CAN, PWM, QEI, and high-resolution ADC simplifies designs that previously required a separate DSP and MCU. Compared with the dsPIC30F4011 family, the 5013 offers expanded analog channels and dual CAN modules.
When designing with this part, observe the Vdd/Vss decoupling guidance from the manufacturer datasheet (place 0.1 uF ceramics within 5 mm of each supply pin) and respect the 30 MIPS maximum throughput (one instruction cycle = four oscillator periods). For migration to newer silicon, Microchip documents seamless paths to dsPIC33F and PIC24 devices in the same 80-pin TQFP footprint.
This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design notes that go beyond the manufacturer datasheet by comparing parametric and packaging trade-offs across the dsPIC30F family.
Drop-in alternatives for DSPIC30F5013T-30I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC30F5013T-30I/PT (same form factor and footprint) — differing in ADC, Core Architecture, Operating Temperature, Package, RAM.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC30F5013-30I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC30F5011-30I/PT
✅ Drop-In✓ In Stock
$7.4 / Unit
View Datasheet →DSPIC30F4013-30I/PT
✅ Drop-In✓ In Stock
$6.78 / Unit
View Datasheet →DSPIC30F4012-30I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC30F5011-30I/ML
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC30F5013T-30I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | dsPIC30F (16-bit DSC, modified Harvard) |
| Maximum CPU Speed | 30 MIPS |
| Program Memory (Flash) | 66 KB (22K x 24-bit) |
| RAM | 4 KB |
| Operating Voltage Range | 2.5 V to 5.5 V |
| ADC | 2x 10-bit, up to 16 channels |
| DAC | 2x 10-bit |
| PWM / Compare Outputs | 6 |
| UART Modules | 2 |
| SPI Modules | 2 |
| I2C Modules | 1 |
| CAN Modules | 2 |
| Quadrature Encoder Interfaces | 2 |
| Capture Inputs | 2 |
| Timers (16-bit) | 5 |
| Package | 80-pin TQFP (PT) 12x12 mm |
| Operating Temperature | -40 C to +85 C (Industrial, 'I' suffix) |
| Mounting Type | Surface Mount |
DSPIC30F5013T-30I/PT Pin Configuration
| Pin 1 | AN0/AN7/RB0 — Analog input 0 / AN7 / I/O port B0 |
| Pin 2 | AN1/RB1 — Analog input 1 / I/O port B1 |
| Pin 3 | AN2/AN6/RB2 — Analog input 2 / AN6 / I/O port B2 |
| Pin 4 | AN3/RB3 — Analog input 3 / I/O port B3 |
| Pin 5 | AN4/RB4 — Analog input 4 / I/O port B4 |
| Pin 6 | AN5/RB5 — Analog input 5 / I/O port B5 |
| Pin 7 | Vss — Ground reference |
| Pin 8 | OSC1/CLKIN — Crystal oscillator input / external clock input |
| Pin 9 | OSC2/CLKOUT — Crystal oscillator output / clock output |
| Pin 10 | FLTA/RA0 — PWM fault input / I/O port A0 |
| Pin 11 | PWM1H/RA1 — PWM 1 high-side output / I/O port A1 |
| Pin 12 | PWM1L/RA2 — PWM 1 low-side output / I/O port A2 |
| Pin 13 | PWM2H/RA3 — PWM 2 high-side output / I/O port A3 |
| Pin 14 | PWM2L/RA4 — PWM 2 low-side output / I/O port A4 |
| Pin 15 | PWM3H/RA5 — PWM 3 high-side output / I/O port A5 |
| Pin 16 | PWM3L/RA6 — PWM 3 low-side output / I/O port A6 |
| Pin 17 | RA7 — I/O port A7 |
| Pin 18 | Vdd — Positive supply (2.5-5.5 V) |
| Pin 19 | AVdd — Analog positive supply |
| Pin 20 | AVss — Analog ground |
| Pin 21 | RC0 — I/O port C0 |
| Pin 22 | RC1 — I/O port C1 |
| Pin 23 | RC2 — I/O port C2 |
| Pin 24 | RC3 — I/O port C3 |
| Pin 25 | RC4 — I/O port C4 |
| Pin 26 | RC5 — I/O port C5 |
| Pin 27 | RC6 — I/O port C6 |
| Pin 28 | RC7 — I/O port C7 |
| Pin 29 | RD0 — I/O port D0 |
| Pin 30 | RD1 — I/O port D1 |
| Pin 31 | RD2 — I/O port D2 |
| Pin 32 | RD3 — I/O port D3 |
| Pin 33 | RD4 — I/O port D4 |
| Pin 34 | RD5 — I/O port D5 |
| Pin 35 | RD6 — I/O port D6 |
| Pin 36 | RD7 — I/O port D7 |
| Pin 37 | RE0 — I/O port E0 |
| Pin 38 | RE1 — I/O port E1 |
| Pin 39 | RE2 — I/O port E2 |
| Pin 40 | RE3 — I/O port E3 |
| Pin 41 | RE4 — I/O port E4 |
| Pin 42 | RE5 — I/O port E5 |
| Pin 43 | RE6 — I/O port E6 |
| Pin 44 | RE7 — I/O port E7 |
| Pin 45 | RF0 — I/O port F0 |
| Pin 46 | RF1 — I/O port F1 |
| Pin 47 | RF2 — I/O port F2 |
| Pin 48 | RF3 — I/O port F3 |
| Pin 49 | RF4 — I/O port F4 |
| Pin 50 | RF5 — I/O port F5 |
| Pin 51 | RF6 — I/O port F6 |
| Pin 52 | RF7 — I/O port F7 |
| Pin 53 | RG0 — I/O port G0 |
| Pin 54 | RG1 — I/O port G1 |
| Pin 55 | RG2 — I/O port G2 |
| Pin 56 | RG3 — I/O port G3 |
| Pin 57 | RG4 — I/O port G4 |
| Pin 58 | RG5 — I/O port G5 |
| Pin 59 | RG6 — I/O port G6 |
| Pin 60 | RG7 — I/O port G7 |
| Pin 61 | RH0 — I/O port H0 |
| Pin 62 | RH1 — I/O port H1 |
| Pin 63 | RH2 — I/O port H2 |
| Pin 64 | RH3 — I/O port H3 |
| Pin 65 | RH4 — I/O port H4 |
| Pin 66 | RH5 — I/O port H5 |
| Pin 67 | RH6 — I/O port H6 |
| Pin 68 | RH7 — I/O port H7 |
| Pin 69 | RI0 — I/O port I0 |
| Pin 70 | RI1 — I/O port I1 |
| Pin 71 | RI2 — I/O port I2 |
| Pin 72 | RI3 — I/O port I3 |
| Pin 73 | RJ0 — I/O port J0 |
| Pin 74 | RJ1 — I/O port J1 |
| Pin 75 | RJ2 — I/O port J2 |
| Pin 76 | RJ3 — I/O port J3 |
| Pin 77 | MCLR — Master Clear (reset) input |
| Pin 78 | EMUD/RA8 — ICD data / I/O port A8 |
| Pin 79 | EMUC/RA9 — ICD clock / I/O port A9 |
| Pin 80 | Vss — Ground reference |
Typical Applications
DSPIC30F5013T-30I/PT is suitable for 6 applications: Three-Phase AC Induction Motor Control, Sensorless BLDC Commutation, Power Factor Correction (PFC) Boost Converter, Uninterruptible Power Supply (UPS) Control, Industrial Sensor Conditioning and CAN Node, Audio Effects and Digital Filtering.
Three-Phase AC Induction Motor Control
The DSPIC30F5013T-30I/PT is a reference platform for field-oriented control (FOC) of three-phase AC induction motors (ACIM), as documented in Microchip application notes AN1078 and AN908. Its 30 MIPS DSP engine executes a complete FOC loop (Clarke, Park, inverse Park, SVM) in under 10 us, while the integrated six PWM outputs drive a three-phase inverter at switching frequencies up to 20 kHz. Two QEI channels accept Hall-sensor or encoder feedback for closed-loop speed and position control, and dual 10-bit ADCs sample phase currents within 2 us for torque-loop closure. Compared with the dsPIC30F4011, the 5013's expanded analog channels simplify multi-shunt current sensing on higher-power drives.
Recommended
Sensorless BLDC Commutation
Sensorless brushless DC (BLDC) motor commutation relies on back-EMF zero-crossing detection at low cost and high reliability. The DSPIC30F5013T-30I/PT's two ADCs and comparator peripherals enable dual-shunt current and BEMF sampling within the same PWM period, while the 30 MIPS core runs AN1083 sensorless algorithms in real time. Its 66 KB Flash accommodates the full sensorless state-machine plus application stack, and the 4 KB RAM is sufficient for sliding-window observers. The device's -40 C to +85 C industrial temperature range supports HVAC blower and pump applications where sensorless operation is preferred.
Recommended
Power Factor Correction (PFC) Boost Converter
Digital Power Factor Correction (PFC) in boost converters demands fast control loops, accurate current sensing and reliable over-current protection. The DSPIC30F5013T-30I/PT runs average-current-mode PFC at 50-100 kHz switching with the DSP engine performing the multiplier and compensator inside a single instruction cycle, according to Microchip AN1106. The 16-channel ADC handles input voltage, input current and output voltage sensing simultaneously, and the PWM module provides leading-edge blanking and fault-shutdown for hardware over-current protection. Industrial 24 V and 48 V bus systems benefit from the wide 2.5-5.5 V supply range that simplifies auxiliary supply design.
Recommended
Uninterruptible Power Supply (UPS) Control
Online UPS systems require simultaneous control of PFC front-end, inverter, battery charger and bypass switch - a workload well matched to the DSPIC30F5013T-30I/PT's 30 MIPS throughput and dual CAN interface for inter-module communication in parallel UPS stacks. The DSP engine executes the digital sine PWM and battery-current regulation loops, while the QEI channels accept grid-frequency measurement for phase-locking. 66 KB Flash accommodates state-machine logic for grid/battery/bypass transitions. AEC-Q100 is not required for stationary UPS, making the industrial-grade 'I' temperature variant the correct choice.
Recommended
Industrial Sensor Conditioning and CAN Node
Industrial sensor nodes often require analog front-end conditioning, local DSP processing and CAN bus communication. The DSPIC30F5013T-30I/PT integrates two ADCs, two DAC channels for excitation, two UARTs for sensor/diagnostic links and two CAN modules for redundant bus communication in factory-automation nodes. Its 66 KB Flash and 4 KB RAM support on-device linearization, calibration and CANopen or DeviceNet protocol stacks. The 2.5-5.5 V supply is well suited to 24 V industrial backplanes with local regulation.
Recommended
Audio Effects and Digital Filtering
Although superseded in new designs by dsPIC33A and 32-bit parts, the DSPIC30F5013T-30I/PT remains capable of audio-bandwidth effects processing (16 kHz to 48 kHz sample rate) such as parametric EQ, reverb and dynamics in mid-tier audio products. The DSP engine's single-cycle MAC sustains biquad filter chains at 48 kHz, while dual DAC channels provide stereo analog output and the I2S or SPI peripherals drive external codecs. The 66 KB Flash fits complete preset libraries and updateable coefficients, making the 5013 a strong choice for legacy product refresh.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC30F5013T-30I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC30F5013-30I/PT | DSPIC30F5011-30I/PT | DSPIC30F4013-30I/PT | DSPIC30F4012-30I/PT |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 80-pin TQFP (PT) 12x12 mm | 80-pin TQFP (PT) 12x12 mm | 80-pin TQFP (PT) 12x12 mm | 80-pin TQFP (PT) 12x12 mm | 80-pin TQFP (PT) 12x12 mm |
| CPU Speed (MIPS) | 30 MIPS | 30 MIPS | 30 MIPS | 20 MIPS (-33%) | 30 MIPS |
| Flash Memory | 66 KB | 66 KB | 66 KB | 48 KB (-27%) | 48 KB (-27%) |
| RAM | 4 KB | 4 KB | 4 KB | 2 KB (-50%) | 2 KB (-50%) |
| CAN Modules | 2 | 2 | 2 | 1 (-50%) | 1 (-50%) |
| ADC Channels | 16 channels (2x 10-bit) | 16 channels | 8 channels (-50%) | 13 channels (-19%) | 8 channels (-50%) |
| PWM Outputs | 6 | 6 | 6 | 4 (-33%) | 4 (-33%) |
| Operating Voltage | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V |
Key Differentiators
- Dual CAN modules on an 80-pin TQFP DSC (vs DSPIC30F4013-30I/PT)
- 66 KB Flash plus 4 KB RAM at 30 MIPS (vs DSPIC30F4013-30I/PT)
- Six PWM outputs plus two QEI for multi-axis motor control (vs DSPIC30F4013-30I/PT)
- Two 10-bit DACs for excitation and reference (vs DSPIC30F5011-30I/PT)
Design Notes
Place a 0.1 uF ceramic decoupling capacitor within 5 mm of every Vdd and AVdd pin, and a bulk 10 uF tantalum or ceramic at the regulator output feeding the TQFP. The device operates from 2.5 V to 5.5 V; if the rail is supplied from a noisy switching converter, add a ferrite bead plus 10 uF bulk to keep ADC readings within datasheet SNR. AVdd must be within 0.3 V of Vdd at power-up to prevent latch-up; tie AVdd to Vdd if the internal ADC is unused.
Estimated: At 30 MIPS, Vdd=5.0 V, the DSPIC30F5013T-30I/PT core draws approximately 60 mA (typ. 50 mA per Microchip datasheet DC characteristics). Power dissipation is therefore ~300 mW worst case. The 80-pin TQFP has theta_JA around 50 C/W on a 4-layer JEDEC test board, giving a junction rise of 15 C above ambient - well inside the 125 C limit. For high ambient designs, recommend thermal vias under the exposed pad (when present) and 1 oz copper pour on inner layers.
Route the analog inputs (AN0-AN15) over a contiguous ground pour and avoid digital traces crossing them. The 80-pin TQFP at 0.4 mm pitch requires 0.15 mm/0.20 mm trace-and-space rules on a 4-layer stack-up. Place the crystal oscillator within 10 mm of OSC1/OSC2 with a guard ring tied to ground. EMUD/EMUC lines for the ICD debugger should be routed as a matched pair with ground between them to avoid noise injection during programming.
MCLR must be pulled high with a 10 kohm resistor and a 100 nF cap to Vdd for in-circuit debug; omitting the cap causes spurious resets on noisy systems. Configuration bits must be set to disable the watchdog unless explicitly enabled in firmware. The 30 MIPS throughput assumes Fosc = 120 MHz (Fcy = 30 MHz) and a 4x PLL - using a slower crystal reduces both MIPS and PWM switching capability. When migrating from the 30F4011 to the 5013, verify that the additional ADC channels are mapped to the expected port pins on your PCB layout.
The PWM outputs (PWM1H/L through PWM3H/L) drive high-current gates; add 22 ohm series damping resistors within 5 mm of the DSC pin to slow edge rates below 50 V/ns and reduce ringing. For CAN bus interfaces, split termination (60 ohm total) and a common-mode choke are recommended for industrial CANopen and DeviceNet networks. The QEI inputs accept differential encoder signals but are 5 V tolerant only when Vdd >= 4.5 V; below that, level-shift to AVdd.
Compliance Information
Industrial-grade 'I' temperature variant (-40 C to +85 C). Compliance data not present in the verified search snippets - consult Microchip product page for current RoHS/REACH status. AEC-Q100 is not applicable because this is a general-purpose DSC, not an automotive-qualified part.
