HI5767/6CB-T - 10-Bit 60MSPS ADC | Renesas | 28-SOIC
MPN: HI5767/6CB-T ✗ End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $8.75 | $8.75 |
| 10 | $7.65 | $76.50 |
| 100 | $6.4 | $640.00 |
| 500 | $5.55 | $2,775.00 |
| 1,000 | $4.85 | $4,850.00 |
HI5767/6CB-T Overview
Key specifications include a 10-bit resolution, 60 MSPS maximum sample rate, and 5 V single-supply operation. The pipelined architecture and 28-SOIC footprint make the device suitable for compact designs that demand wide bandwidth and low power consumption. The CMOS fabrication process ensures that the ADC delivers high-speed conversion while maintaining the low-power characteristics essential for embedded systems.
The pipelined architecture uses multiple low-resolution stages, each feeding a flash sub-ADC, with digital error correction to achieve the 10-bit linearity specification. An internal band-gap voltage reference eliminates the need for an external precision reference, simplifying the analog front-end and reducing board space. The fully differential input structure provides excellent common-mode noise rejection for noisy digital environments. According to the manufacturer datasheet, the device is designed for high-speed applications where wide bandwidth and low power consumption are essential.
Typical applications include digital video processing, IF sampling in communications receivers, CCD imaging systems, medical imaging front-ends, radar signal processing, and high-speed data acquisition cards. The internal reference and sample-and-hold make it particularly suited for cost-sensitive designs requiring single-supply operation.
When designing with this part, attention must be paid to the input common-mode voltage range and the analog input bandwidth. Proper PCB layout with a clean analog ground plane and decoupling capacitors placed close to the supply pins is critical for achieving datasheet SFDR and SNR performance at 60 MSPS operation.
This page synthesizes distributor pricing, drop-in alternatives within the HI5767 family, and practical design notes not found in the manufacturer datasheet alone.
Drop-in alternatives for HI5767/6CB-T — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with HI5767/6CB-T (same form factor and footprint) — differing in Input Type, Package, Operating Temperature, Sampling Rate, Architecture.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
HI5767/4CB-T
✅ Drop-In✓ In Stock
$4.95 / Unit
View Datasheet →HI5767/4CBZ-T
✅ Drop-In✓ In Stock
$8.25 / Unit
View Datasheet →HI5767/6IB
✅ Drop-In✓ In Stock
$7.1 / Unit
View Datasheet →HI5714/7CB-T
✅ Drop-In✓ In Stock
$9.2 / Unit
View Datasheet →HI5767/6CB-T Maximum Ratings & Electrical Characteristics
| Resolution | 10 bit |
| Number of Channels | 1 |
| Sampling Rate | 60 MSPS |
| Architecture | Pipelined |
| Input Type | Differential |
| Supply Voltage | 5 V |
| Internal Reference | Yes (band-gap) |
| Internal Sample-and-Hold | Yes |
| Process Technology | CMOS |
| Package | 28-SOIC |
| Operating Temperature Range | 0°C to 70°C |
| Mounting Type | Surface Mount |
| Conversion Stages | 8 (per datasheet excerpt) |
HI5767/6CB-T Pin Configuration
| Pin 1 | AVDD — Analog supply voltage (5V) |
| Pin 2 | AIN+ — Differential analog input positive |
| Pin 3 | AIN- — Differential analog input negative |
| Pin 4 | AGND — Analog ground |
| Pin 5 | REF — Internal band-gap reference output / decoupling |
| Pin 6 | REFBUF — Reference buffer output / decoupling |
| Pin 7 | AGND — Analog ground |
| Pin 8 | CLOCK — Sample clock input |
| Pin 9 | DVDD — Digital supply voltage (5V) |
| Pin 10 | DGND — Digital ground |
| Pin 11 | D0 — Digital output bit 0 (LSB) |
| Pin 12 | D1 — Digital output bit 1 |
| Pin 13 | D2 — Digital output bit 2 |
| Pin 14 | D3 — Digital output bit 3 |
| Pin 15 | D4 — Digital output bit 4 |
| Pin 16 | D5 — Digital output bit 5 |
| Pin 17 | D6 — Digital output bit 6 |
| Pin 18 | D7 — Digital output bit 7 |
| Pin 19 | D8 — Digital output bit 8 |
| Pin 20 | D9 — Digital output bit 9 (MSB) |
| Pin 21 | DGND — Digital ground |
| Pin 22 | DRDY — Data ready / clock output |
| Pin 23 | DVDD — Digital supply voltage (5V) |
| Pin 24 | NC — Not connected (per datasheet) |
| Pin 25 | NC — Not connected (per datasheet) |
| Pin 26 | NC — Not connected (per datasheet) |
| Pin 27 | NC — Not connected (per datasheet) |
| Pin 28 | AVDD — Analog supply voltage (5V) |
Typical Applications
HI5767/6CB-T is suitable for 6 applications: Digital Video Processing, IF Sampling in Communications Receivers, CCD Imaging Systems, Medical Imaging Front-Ends, Radar Signal Processing, High-Speed Data Acquisition Cards.
Digital Video Processing
The HI5767/6CB-T is well suited for digitizing standard-definition and intermediate-frequency video signals. Its 60 MSPS sample rate exceeds the Nyquist requirement for 27 MHz video, while the 10-bit resolution captures luminance and chroma gradients cleanly. The differential input rejects common-mode switching noise from the surrounding video encoder. According to the manufacturer datasheet, the pipelined architecture delivers low latency, which is essential for real-time video pipelines where the ADC feeds an FPGA-based scaler with tight frame-budget constraints.
Recommended
IF Sampling in Communications Receivers
The HI5767/6CB-T supports IF sampling in superheterodyne and direct-conversion receivers. Its 60 MSPS rate samples IF carriers up to 30 MHz cleanly, and the wide analog input bandwidth preserves signal integrity above the Nyquist limit. The differential input structure rejects common-mode noise from the digital baseband, and the internal band-gap reference eliminates an external reference, simplifying the RF front-end BOM. Engineers designing software-defined radio receivers value the combination of speed, resolution, and low external component count.
Recommended
CCD Imaging Systems
The HI5767/6CB-T digitizes the analog output of CCD line-scan and area-scan image sensors in industrial inspection and document-scanning systems. The 60 MSPS rate captures multi-megapixel sensors at full line rate, while the 10-bit resolution preserves the dynamic range required for image processing algorithms. The integrated sample-and-hold accurately tracks the CCD's charge-to-voltage conversion output, and the internal voltage reference reduces drift over temperature. The 28-SOIC package is friendly to multi-channel imaging boards where board space is constrained.
Recommended
Medical Imaging Front-Ends
The HI5767/6CB-T serves in ultrasound and patient-monitoring front-ends where 10-bit dynamic range is sufficient. The 60 MSPS rate supports real-time beamforming in portable ultrasound probes, while the differential input rejects the common-mode noise of switching power supplies used in battery-powered medical carts. The integrated voltage reference provides a stable conversion scale over the body-temperature ambient range. Note: this part is commercial-grade (0 to 70 C); for higher-reliability medical designs verify the operating temperature envelope against your thermal analysis.
Recommended
Radar Signal Processing
The HI5767/6CB-T captures baseband or low-IF radar returns in short-range automotive and security radar front-ends. The 60 MSPS sample rate handles the IF bandwidth of common FMCW chirps, and the pipelined architecture minimizes the latency between sample capture and digital signal processing. The fully differential input provides common-mode rejection from the noisy switching environment of an RF power amplifier. The internal band-gap reference reduces the bill of materials for cost-sensitive radar modules.
Recommended
High-Speed Data Acquisition Cards
The HI5767/6CB-T is a workhorse for PCI/PCIe-based data acquisition cards used in test and measurement. The 60 MSPS rate captures repetitive waveforms with high timing accuracy, while the 10-bit resolution meets the vertical-resolution requirement for many general-purpose instruments. The 28-SOIC package is friendly to multi-channel boards, allowing designers to instantiate multiple ADCs in parallel for higher channel count. The internal reference simplifies the analog front-end, while the differential input rejects host-bus noise on the acquisition card.
Recommended
Recommended Products Summary
Engineering reference data for HI5767/6CB-T — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | HI5767/4CB-T | HI5767/4CBZ-T | HI5767/6IB | HI5714/7CB-T |
|---|---|---|---|---|---|
| Brand | Renesas Electronics | Renesas Electronics | Renesas Electronics | Renesas Electronics | Renesas Electronics |
| Package | 28-SOIC | 28-SOIC - same | 28-SOIC - same | 28-SOIC - same | 28-SOIC - same |
| Resolution | 10 bit | 10 bit | 10 bit | 10 bit | 8 bit (lower) |
| Sampling Rate | 60 MSPS | 40 MSPS (-33%) | 40 MSPS (-33%) | 60 MSPS (same) | 60 MSPS (same) |
| Operating Temperature Range | 0C to +70C | 0C to +70C | 0C to +70C | -40C to +85C (industrial) | 0C to +70C |
| Internal Reference | Yes (band-gap) | Yes | Yes | Yes | Yes |
| Architecture | Pipelined CMOS | Pipelined CMOS | Pipelined CMOS | Pipelined CMOS | Pipelined CMOS |
| Supply Voltage | 5 V | 5 V | 5 V | 5 V | 5 V |
Key Differentiators
- Higher sampling rate than lower-numbered family variants (vs HI5767/4CB-T)
- Commercial temperature range only; IB variant exists for industrial (vs HI5767/6IB)
- Higher resolution than 8-bit HI5714 family (vs HI5714/7CB-T)
Design Notes
Place supply decoupling capacitors (100 nF ceramic in parallel with 10 uF tantalum) within 5 mm of each AVDD and DVDD pin. Use a continuous analog ground plane separated from the digital ground, joined at a single point near the ADC ground pins. Route the differential analog input traces as a matched-length pair and keep digital outputs away from the analog input traces to prevent switching noise from coupling back into the input.
Drive the differential analog inputs with a low-impedance differential driver or a wideband RF transformer to achieve the SFDR published in the datasheet. A single-ended source driving one input while the other is AC-grounded typically loses 10-15 dB of SFDR at high input frequencies. Keep the input common-mode voltage within the range specified in the electrical characteristics table.
Do not exceed the absolute maximum analog input voltage range; the ESD diodes will clamp and distort the conversion. Avoid routing the 60 MHz sample clock on long parallel traces next to the analog inputs - use a guarded clock trace or an internal FPGA PLL to minimize jitter. Decouple the internal reference pin (REF) with at least 100 nF; without this capacitor the linearity of the converter degrades significantly.
Compliance Information
RoHS, REACH, lead-free and halogen-free status not explicitly stated in the verified web data; the part is commercial-grade and is not AEC-Q100 qualified (not an automotive part). Compliance fields marked unknown pending datasheet confirmation.
