LTC2315CTS8-12 - 12-Bit 5Msps Serial SAR ADC, TSOT-23-8 | ADI
MPN: LTC2315CTS8-12 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $5.1 | $5.10 |
| 10 | $4.59 | $45.90 |
| 100 | $4.07 | $407.00 |
| 500 | $3.66 | $1,830.00 |
| 1,000 | $3.25 | $3,250.00 |
LTC2315CTS8-12 Overview
What is a SAR ADC? A successive-approximation-register analog-to-digital converter (SAR ADC) samples an analog input and converts it to a digital code through a binary-search algorithm performed by a precision DAC, comparator, and successive-approximation register. SAR ADCs sit within the broader ADC hierarchy: ADC -> Nyquist-rate ADC -> SAR ADC -> data converter IC -> signal chain semiconductor. They are favored for their deterministic latency, lack of pipeline delay, low power consumption, and excellent DC accuracy at moderate to high sampling rates up to several MSPS.
The LTC2315-12 features a high-speed SPI-compatible serial interface that supports 1.8 V, 2.5 V, 3 V, and 5 V logic, enabling direct connection to low-voltage FPGAs, microcontrollers, and DSPs without level shifters. Both nap and sleep power-down modes further reduce system power between conversions. Its sample-rate-to-power ratio makes the part ideal for compact battery-powered and high-speed acquisition systems where the analog front end must not dominate the power budget.
Architecture is built around a charge-redistribution capacitive DAC core with internal sample-and-hold, an on-chip 2.5 V bandgap reference buffered through a low-noise amplifier, and a flexible SCK/MOSI/MISO-compatible serial port that supports daisy-chaining. The wide supply range lets the part ride directly off a 3.3 V or 5 V analog rail, simplifying power-tree design in mixed-signal boards.
Typical applications include portable instrumentation, multiplexed data acquisition, industrial process control, optical networking monitoring loops, and high-speed sensor signal conditioning. The TSOT-23-8 footprint supports space-constrained designs such as handheld oscilloscope probes, motor control feedback paths, and medical patient-monitoring front ends.
When designing with this ADC, place the supply decoupling capacitors (typically 10 µF tantalum in parallel with 0.1 µF ceramic) within 5 mm of the OVDD and AVDD pins to maintain noise-free reference voltage. Drive REFIN low only when the internal reference is used; otherwise apply an external low-noise reference for highest DC accuracy.
This page synthesizes distributor pricing, drop-in alternative listings, and practical design notes not found in the manufacturer datasheet, giving engineers a faster path from part selection to prototype.
Drop-in alternatives for LTC2315CTS8-12 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
LTC2315HTS8-12#TRMPBF
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LTC2315CTS8-12#TRMPBF
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LTC2315CTS8-12#PBF
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LTC2314HTS8-14#TRMPBF
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LTC2313HTS8-14#TRMPBF
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LTC2312HTS8-14#TRMPBF
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LTC2315CTS8-12 Maximum Ratings & Electrical Characteristics
| Resolution | 12 bits |
| Sample Rate | 5 Msps |
| Number of Channels | 1 |
| Architecture | SAR |
| Analog Supply Voltage (AVDD) | 2.7 V to 5.25 V |
| Digital I/O Supply (OVDD) | 1.8 V to 5 V (logic-compatible) |
| Supply Current (5 Msps) | 6.4 mA (typ) |
| SINAD | 72.6 dB |
| THD | -84 dB |
| Internal Reference Drift | 20 ppm/°C (max) |
| Reference Type | Internal bandgap + buffer |
| Serial Interface | SPI-compatible (1.8/2.5/3/5 V logic) |
| Power-Down Modes | Nap and Sleep |
| Operating Temperature Range (C grade) | 0°C to +70°C |
| Package | TSOT-23-8 |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
LTC2315CTS8-12 Pin Configuration
| Pin 1 | AIN — Analog input |
| Pin 2 | GND — Ground |
| Pin 3 | REFIN — Reference input / internal reference bypass |
| Pin 4 | AVDD — Analog supply voltage (2.7 V to 5.25 V) |
| Pin 5 | OVDD — Digital I/O supply voltage (1.8 V to 5 V) |
| Pin 6 | SCK — Serial interface clock input |
| Pin 7 | SDO — Serial data output |
| Pin 8 | CNV — Convert / chip select input |
Typical Applications
LTC2315CTS8-12 is suitable for 7 applications: Portable Battery-Powered Instrumentation, Multiplexed Data Acquisition Modules, Optical Network Monitoring Loops, Motor Control Feedback and Current Sensing, Industrial Process Control Sensor Front Ends, Medical Patient Monitoring Signal Chains, High-Speed Sensor Signal Conditioning.
Portable Battery-Powered Instrumentation
The LTC2315CTS8-12 fits portable instrumentation because its 6.4 mA typical current at 5 Msps and the integrated bandgap reference let it ride on a 3.3 V or 5 V analog rail without a separate precision reference. According to the ADI datasheet, nap and sleep power-down modes drop quiescent current between conversions, extending battery runtime in handheld oscilloscope probes and field data loggers. The 5 Msps sample rate also captures transient sensor events that slower 1 Msps SAR ADCs would alias. In a typical circuit the ADC sits behind a low-noise op-amp buffer that drives AIN, while SPI connects directly to a low-power MCU for sample read-out. Designers gain a small PCB footprint plus a fast, deterministic conversion latency suitable for triggered captures.
Recommended
Multiplexed Data Acquisition Modules
In multiplexed data-acquisition modules, the LTC2315CTS8-12 provides a fast 5 Msps single-shot conversion behind an analog mux to digitize multiple analog channels in rapid sequence. According to the ADI datasheet, the SPI-compatible serial interface supports 1.8 V to 5 V logic, allowing direct connection to a wide range of FPGA or MCU host controllers without level shifters. Its TSOT-23-8 footprint keeps the analog front end compact in modular PLC and SCADA form factors. The wide 2.7 V to 5.25 V AVDD range lets the ADC share a single analog rail with downstream op-amps, simplifying the power tree. Engineers should account for mux settling time and use a buffer amplifier to drive AIN at full sample rate.
Recommended
Optical Network Monitoring Loops
Optical transponder and line-card monitoring loops use the LTC2315CTS8-12 to digitize received-signal-strength indicators, photodiode currents, and laser-bias feedback at 5 Msps to track fast transients. According to the ADI datasheet, the 72.6 dB SINAD and -84 dB THD performance provides ample dynamic range to resolve small modulation envelopes on top of large DC bias levels. The TSOT-23-8 footprint is small enough to fit alongside SFP+ modules on densely populated line cards. Nap and sleep modes help reduce system power when the host controller is in standby. A typical front end pairs the ADC with a transimpedance amplifier and an anti-alias RC network sized for the 5 Msps Nyquist bandwidth.
Recommended
Motor Control Feedback and Current Sensing
Closed-loop motor control uses the LTC2315CTS8-12 to digitize phase-current shunt signals at 5 Msps, giving the controller high-bandwidth feedback for field-oriented control loops. According to the ADI datasheet, the deterministic SAR latency avoids the pipeline delays found in high-speed pipelined ADCs, simplifying the control-law math. Its 6.4 mA consumption and TSOT-23-8 package keep the analog island small on inverter PCBs that must clear creepage and clearance requirements. The 2.7 V to 5.25 V analog supply lets it share the 3.3 V or 5 V analog rail typically present in motor-control designs. Place the ADC near the shunt amplifier to minimize ground loops and avoid switching-noise coupling into AIN.
Recommended
Industrial Process Control Sensor Front Ends
Process-control analog input modules pair the LTC2315CTS8-12 with a 4-20 mA or 0-10 V receiver front end to digitize process variables such as pressure, flow, and temperature. According to the ADI datasheet, the integrated 2.5 V reference (20 ppm/°C drift) eliminates an external reference and reduces BOM cost in high-channel-count modules. The wide -40°C to +85°C operating range (industrial grade variants) and SPI-compatible serial interface let one MCU serve many ADCs in a daisy-chain configuration. Nap and sleep modes cut module power between scans. Place 10 µF + 0.1 µF decoupling on AVDD within 5 mm of the pin and route AIN as a differential pair to reject common-mode noise from the plant environment.
Recommended
Medical Patient Monitoring Signal Chains
Patient-monitoring designs use the LTC2315CTS8-12 to digitize ECG, pulse-oximeter, and bio-impedance signals at 5 Msps, capturing the fast edges and high-frequency components of biopotential waveforms. According to the ADI datasheet, the 72.6 dB SINAD gives enough dynamic range to resolve small signal features on top of large offset levels typical of electrode measurements. The TSOT-23-8 package keeps the analog island compact on wearable patches and bedside monitors, while the SPI-compatible interface connects directly to low-power application processors. Use a low-noise instrumentation amp in front of the ADC and enable nap mode between scans to extend battery life in portable designs.
Recommended
High-Speed Sensor Signal Conditioning
High-speed sensor front ends digitize the output of accelerometers, strain gauges, and ultrasonic transducers with the LTC2315CTS8-12 at 5 Msps, enabling real-time analysis of vibration and acoustic signatures. According to the ADI datasheet, the SAR architecture provides single-cycle deterministic conversion, which is critical for time-of-flight and acoustic-emission applications where pipeline delay would distort the measurement. The wide 2.7 V to 5.25 V analog supply range allows the ADC to be powered from the same 5 V rail that powers the sensor bias. Place a low-noise buffer between the sensor output and AIN, and add a small anti-alias RC network sized for the 2.5 MHz Nyquist bandwidth.
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Recommended Products Summary
Engineering reference data for LTC2315CTS8-12 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | LTC2315HTS8-12#TRMPBF | LTC2314HTS8-14#TRMPBF | LTC2313HTS8-14#TRMPBF | LTC2312HTS8-14#TRMPBF |
|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | TSOT-23-8 | TSOT-23-8 - same | TSOT-23-8 - same | TSOT-23-8 - same | TSOT-23-8 - same |
| Resolution | 12 bits | 12 bits | 14 bits | 14 bits | 14 bits |
| Sample Rate | 5 Msps | 5 Msps | 2 Msps | 1 Msps | 500 ksps |
| Temperature Grade | 0C to +70C (C grade) | -40C to +125C (H grade) | -40C to +125C (H grade) | -40C to +125C (H grade) | -40C to +125C (H grade) |
| Automotive AEC-Q100 | No (commercial) | Yes | Yes | Yes | Yes |
| Analog Supply (AVDD) | 2.7 V to 5.25 V | 2.7 V to 5.25 V | 2.7 V to 5.25 V | 2.7 V to 5.25 V | 2.7 V to 5.25 V |
| Internal Reference | Yes (2.5 V, 20 ppm/C) | Yes (2.5 V, 20 ppm/C) | Yes (2.5 V, 20 ppm/C) | Yes (2.5 V, 20 ppm/C) | Yes (2.5 V, 20 ppm/C) |
Key Differentiators
- Highest sample rate in the LTC231x TSOT-23-8 SAR ADC family (vs LTC2314HTS8-14#TRMPBF)
- Smallest 5 Msps SAR ADC footprint in the LTC231x family (vs LTC2315HTS8-12#TRMPBF (extended temperature grade))
- Integrated reference and reference buffer reduce BOM (vs External reference designs with discrete ADCs)
- Wide AVDD range simplifies power-tree design (vs Discrete 3.3 V-only SAR ADCs)
Design Notes
Place 10 uF tantalum in parallel with 0.1 uF ceramic decoupling capacitors within 5 mm of the AVDD and OVDD pins to keep reference and logic supplies noise-free. Estimated: at 6.4 mA typical AVDD current, a 0.1 uF ceramic has roughly 1.6 ohm impedance at 10 MHz; without a larger bulk capacitor, switching transients from the reference buffer can couple into AIN. Use a ground-referenced ferrite bead on AVDD if the upstream regulator is a switching type.
Route AIN as a short, guarded trace with a ground-fill on both sides to minimize coupling from SCK and SDO. Estimated: at the 5 Msps sample rate, the analog input bandwidth approaches 2.5 MHz; a 1 cm unshielded trace can pick up several mV from adjacent digital lines, which directly degrades the 72.6 dB SINAD. Place the input buffer amplifier within 3 mm of the AIN pin and keep the analog ground plane unbroken under the entire ADC footprint.
Do not leave REFIN floating when the internal reference is used; the datasheet recommends a 0.1 uF ceramic bypass on REFIN to keep the buffered reference quiet. Forgetting this bypass typically shows up as elevated noise and degraded SINAD at higher input frequencies. If an external reference is applied, drive REFIN from a low-impedance source such as the ADR4525 and remove the internal reference from the signal path via the configuration sequence described in the datasheet.
The SPI-compatible serial interface supports 1.8 V to 5 V logic on OVDD, but keep SCK rise/fall times under 5 ns to avoid double-clocking the internal shift register. Series-terminate SCK with a 33 ohm resistor at the driver end when the host is more than 25 mm from the ADC, and avoid routing SCK near the AIN trace. Use the nap or sleep modes between bursts of conversion to lower average current when the host controller does not need continuous sampling.
Compliance Information
RoHS and REACH compliance per Analog Devices product page; C grade (commercial) is not AEC-Q100 qualified - select LTC2315HTS8-12 for automotive.
