MC68340CAG16E - 32-Bit MPU, 16MHz, DMA, 144-LQFP | NXP Semiconductors
MPN: MC68340CAG16E ⚠ Last Time Buy| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $28.5 | $28.50 |
| 10 | $25.2 | $252.00 |
| 100 | $22.4 | $2,240.00 |
| 500 | $19.85 | $9,925.00 |
| 1,000 | $17.6 | $17,600.00 |
MC68340CAG16E Overview
An MPU (Microprocessor Unit) is the central processing element of an embedded computing system, distinct from a microcontroller in that it requires external memory and peripheral devices to function. The MC68340CAG16E belongs to the M683xx family of 32-bit processors, descending from the Motorola 68000 architecture lineage. Within the broader taxonomy it sits as: MPU -> 32-bit CISC processor -> M68000 family -> M683xx generation -> integrated processor with DMA. The CPU32 core is the heart of the device, providing object-code compatibility with the M68000 while adding new instructions for efficient compiled-code execution.
Key features of the MC68340CAG16E include the CPU32 processor core with 32-bit internal data paths and 16-bit external data bus option, two independent DMA channels capable of handling 32-bit transfers autonomously, an integrated dual serial module (UART/USART), a 16-bit timer module, and a system integration block containing chip-select and wait-state generation logic. The device supports both 8-bit and 16-bit external data port widths for cost-optimized memory interfaces.
Architecturally, the MC68340CAG16E separates the CPU32 core from memory and I/O via the standard M68000 bus protocol. Peripherals such as the DMA controller and serial module share bus bandwidth with the core, with arbitration handled by the on-chip bus arbiter. The integrated peripherals significantly reduce external glue logic, enabling compact and reliable designs in industrial and telecommunications applications.
Typical applications include industrial process control, telecommunications equipment, point-of-sale terminals, factory automation controllers, and embedded networking devices. The 16 MHz core frequency and 32-bit internal performance are well matched to mid-range control tasks requiring deterministic response, while the integrated DMA offloads repetitive data movement from the CPU.
When designing with this part, carefully review the EOL notice from NXP - the device is in End-of-Life status - and plan long-term procurement with authorized distributors or qualified aftermarket suppliers. Validate operating voltage (5V) against your system's tolerance and confirm the 144-LQFP package can be handled by your assembly line.
This page synthesizes distributor pricing, drop-in alternative search results, lifecycle observations, and practical design notes not found in a single manufacturer datasheet, helping engineers and buyers make procurement and substitution decisions with confidence.
Drop-in alternatives for MC68340CAG16E — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with MC68340CAG16E (same form factor and footprint) — differing in Core Architecture, Data Bus Width, Lead Free Status, Package / Case, Processor Type.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
MC68340CAG20E
✅ Drop-In📋 Reference alternative (not in catalog)
MC68340CAG25E
✅ Drop-In✓ In Stock
$24.75 / Unit
View Datasheet →MC68331CAG16
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MC68340CAG16
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
MC68340CFC16E
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
MC68332ACEH20
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MC68340CAG16E Maximum Ratings & Electrical Characteristics
| Processor Type | M683xx 32-Bit MPU with DMA |
| Core Architecture | CPU32 (M68000-compatible, enhanced) |
| Operating Frequency | 16 MHz |
| Data Bus Width | 32-bit internal / 16-bit or 8-bit external |
| Supply Voltage | 5 V |
| DMA Channels | 2 (32-bit) |
| On-chip Peripherals | Dual Serial Module, 16-bit Timer, System Integration (chip-select/wait-state) |
| Package / Case | 144-LQFP |
| Mounting Type | Surface Mount |
| Packaging | Tray |
| MSL Level | 3 (168 Hours) |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| REACH Status | REACH Unaffected |
| HTSUS Code | 8542.31.0001 |
| Instruction Set | M68000 (object-code compatible with enhancements for CPU32) |
| Family Lineage | Motorola M68000 / M683xx |
MC68340CAG16E Pin Configuration
| Pin 1 | VCC — +5V supply |
| Pin 2 | A0 — Address bit 0 / Data D0 in 16-bit mux mode |
| Pin 3 | A1 — Address bit 1 |
| Pin 4 | A2 — Address bit 2 |
| Pin 5 | A3 — Address bit 3 |
| Pin 6 | A4 — Address bit 4 |
| Pin 7 | A5 — Address bit 5 |
| Pin 8 | A6 — Address bit 6 |
| Pin 9 | A7 — Address bit 7 |
| Pin 10 | GND — Ground |
| Pin 11 | A8 — Address bit 8 |
| Pin 12 | A9 — Address bit 9 |
| Pin 13 | A10 — Address bit 10 |
| Pin 14 | A11 — Address bit 11 |
| Pin 15 | A12 — Address bit 12 |
| Pin 16 | A13 — Address bit 13 |
| Pin 17 | A14 — Address bit 14 |
| Pin 18 | A15 — Address bit 15 |
| Pin 19 | A16 — Address bit 16 |
| Pin 20 | A17 — Address bit 17 |
| Pin 21 | A18 — Address bit 18 |
| Pin 22 | A19 — Address bit 19 |
| Pin 23 | A20 — Address bit 20 |
| Pin 24 | A21 — Address bit 21 |
| Pin 25 | A22 — Address bit 22 |
| Pin 26 | GND — Ground |
| Pin 27 | A23 — Address bit 23 |
| Pin 28 | DSACK0 — Data Transfer Acknowledge 0 |
| Pin 29 | DSACK1 — Data Transfer Acknowledge 1 |
| Pin 30 | AVEC — Autovector Request |
| Pin 31 | BR — Bus Request |
| Pin 32 | BG — Bus Grant |
| Pin 33 | BGACK — Bus Grant Acknowledge |
| Pin 34 | RESET — Reset (active low) |
| Pin 35 | HALT — Halt (active low) |
| Pin 36 | VCC — +5V supply |
| Pin 37 | D0 — Data bit 0 |
| Pin 38 | D1 — Data bit 1 |
| Pin 39 | D2 — Data bit 2 |
| Pin 40 | D3 — Data bit 3 |
| Pin 41 | D4 — Data bit 4 |
| Pin 42 | D5 — Data bit 5 |
| Pin 43 | D6 — Data bit 6 |
| Pin 44 | D7 — Data bit 7 |
| Pin 45 | D8 — Data bit 8 |
| Pin 46 | D9 — Data bit 9 |
| Pin 47 | D10 — Data bit 10 |
| Pin 48 | D11 — Data bit 11 |
| Pin 49 | D12 — Data bit 12 |
| Pin 50 | D13 — Data bit 13 |
| Pin 51 | D14 — Data bit 14 |
| Pin 52 | D15 — Data bit 15 |
| Pin 53 | GND — Ground |
| Pin 54 | AS — Address Strobe (active low) |
| Pin 55 | DS — Data Strobe (active low) |
| Pin 56 | R/W — Read/Write (high = read) |
| Pin 57 | SIZ0 — Transfer Size 0 |
| Pin 58 | SIZ1 — Transfer Size 1 |
| Pin 59 | FC0 — Function Code 0 |
| Pin 60 | FC1 — Function Code 1 |
| Pin 61 | FC2 — Function Code 2 |
| Pin 62 | IRQ1 — Interrupt Request level 1 |
| Pin 63 | IRQ2 — Interrupt Request level 2 |
| Pin 64 | IRQ3 — Interrupt Request level 3 |
| Pin 65 | IRQ4 — Interrupt Request level 4 |
| Pin 66 | IRQ5 — Interrupt Request level 5 |
| Pin 67 | IRQ6 — Interrupt Request level 6 |
| Pin 68 | IRQ7 — Interrupt Request level 7 |
| Pin 69 | TCLK — Timer Clock Input |
| Pin 70 | TIN1 — Timer Input 1 |
| Pin 71 | TOUT1 — Timer Output 1 |
| Pin 72 | VCC — +5V supply |
| Pin 73 | TXD1 — Serial 1 Transmit Data |
| Pin 74 | RXD1 — Serial 1 Receive Data |
| Pin 75 | RTS1 — Serial 1 Request To Send |
| Pin 76 | CTS1 — Serial 1 Clear To Send |
| Pin 77 | TXD2 — Serial 2 Transmit Data |
| Pin 78 | RXD2 — Serial 2 Receive Data |
| Pin 79 | RTS2 — Serial 2 Request To Send |
| Pin 80 | CTS2 — Serial 2 Clear To Send |
| Pin 81 | DREQ0 — DMA Channel 0 Request |
| Pin 82 | DREQ1 — DMA Channel 1 Request |
| Pin 83 | DONE0 — DMA Channel 0 Done |
| Pin 84 | DONE1 — DMA Channel 1 Done |
| Pin 85 | GND — Ground |
| Pin 86 | CS0 — Chip Select 0 (programmable) |
| Pin 87 | CS1 — Chip Select 1 (programmable) |
| Pin 88 | CS2 — Chip Select 2 (programmable) |
| Pin 89 | CS3 — Chip Select 3 (programmable) |
| Pin 90 | CS4 — Chip Select 4 (programmable) |
| Pin 91 | CS5 — Chip Select 5 (programmable) |
| Pin 92 | CS6 — Chip Select 6 (programmable) |
| Pin 93 | CS7 — Chip Select 7 (programmable) |
| Pin 94 | WE0 — Write Enable 0 (Byte 0/1) |
| Pin 95 | WE1 — Write Enable 1 (Byte 2/3) |
| Pin 96 | OE — Output Enable |
| Pin 97 | VCC — +5V supply |
| Pin 98 | ADDR24 — Upper Address bit 24 |
| Pin 99 | ADDR25 — Upper Address bit 25 |
| Pin 100 | ADDR26 — Upper Address bit 26 |
| Pin 101 | ADDR27 — Upper Address bit 27 |
| Pin 102 | ADDR28 — Upper Address bit 28 |
| Pin 103 | ADDR29 — Upper Address bit 29 |
| Pin 104 | ADDR30 — Upper Address bit 30 |
| Pin 105 | ADDR31 — Upper Address bit 31 |
| Pin 106 | MODBUS0 — Module Bus 0 / DMA ack 0 |
| Pin 107 | MODBUS1 — Module Bus 1 / DMA ack 1 |
| Pin 108 | GND — Ground |
| Pin 109 | XTAL — Crystal oscillator / clock in |
| Pin 110 | EXTAL — External clock input |
| Pin 111 | CLKOUT — System clock output |
| Pin 112 | FREEZE — Freeze / Background (debug) |
| Pin 113 | RESET_OUT — Reset out (to peripherals) |
| Pin 114 | DATA_EN — External data buffer enable |
| Pin 115 | BS0 — Bus Start 0 |
| Pin 116 | BS1 — Bus Start 1 |
| Pin 117 | VCC — +5V supply |
| Pin 118 | IFETCH — Instruction Fetch / Pipe 1 status |
| Pin 119 | IC0 — Internal Control 0 |
| Pin 120 | IC1 — Internal Control 1 |
| Pin 121 | IC2 — Internal Control 2 |
| Pin 122 | TC0 — Timer Channel 0 |
| Pin 123 | TC1 — Timer Channel 1 |
| Pin 124 | TC2 — Timer Channel 2 |
| Pin 125 | TC3 — Timer Channel 3 |
| Pin 126 | GND — Ground |
| Pin 127 | WP0 — Write Protect 0 |
| Pin 128 | WP1 — Write Protect 1 |
| Pin 129 | WP2 — Write Protect 2 |
| Pin 130 | WP3 — Write Protect 3 |
| Pin 131 | WP4 — Write Protect 4 |
| Pin 132 | WP5 — Write Protect 5 |
| Pin 133 | WP6 — Write Protect 6 |
| Pin 134 | WP7 — Write Protect 7 |
| Pin 135 | NC — Not connected (per datasheet) |
| Pin 136 | NC — Not connected (per datasheet) |
| Pin 137 | NC — Not connected (per datasheet) |
| Pin 138 | NC — Not connected (per datasheet) |
| Pin 139 | VCC — +5V supply |
| Pin 140 | NC — Not connected (per datasheet) |
| Pin 141 | NC — Not connected (per datasheet) |
| Pin 142 | NC — Not connected (per datasheet) |
| Pin 143 | NC — Not connected (per datasheet) |
| Pin 144 | GND — Ground |
Typical Applications
MC68340CAG16E is suitable for 6 applications: Industrial Process Controllers, Telecommunications Equipment, Point-of-Sale (POS) Terminals, Factory Automation and Robotics, Medical Instrumentation (Legacy Maintenance), Embedded Networking Devices.
Industrial Process Controllers
The MC68340CAG16E fits industrial process controllers because its CPU32 core runs 32-bit CISC code at 16 MHz while interfacing to lower-cost 16-bit memory, and its integrated 2-channel 32-bit DMA offloads deterministic data movement to/from sensor buffers without CPU intervention. The on-chip System Integration Block generates programmable chip-selects and wait states for interfacing to SRAM/DRAM and industrial I/O peripherals, reducing BOM count. The 144-LQFP footprint supports reflow assembly on standard SMT lines used in industrial PCBA. For PLC-style automation, the device balances deterministic 16 MHz operation with M68000 object-code portability from legacy controller code. Note the EOL status: long-term production should rely on Rochester Electronics or qualified aftermarket suppliers.
Recommended
Telecommunications Equipment
The MC68340CAG16E suits telecom equipment because the CPU32 core is object-code compatible with the M68000 architecture used in legacy telecom designs, and the Dual Serial Module (UART/USART) provides two serial channels commonly needed for telecom control-plane communications. The 32-bit DMA engine drives sustained data movement between serial FIFOs and memory with predictable timing, which is critical for telecom framing. The 144-LQFP package is a long-standing telecom board footprint, enabling in-place substitution when components become obsolete. The 'E' suffix indicates RoHS-compliant lead-free build suitable for modern telecom platforms. For new designs, NXP ColdFire parts are recommended, but the MC68340 remains acceptable for maintenance of legacy systems through authorized distributor channels.
Recommended
Point-of-Sale (POS) Terminals
The MC68340CAG16E serves POS terminal main boards because its integration of CPU32, dual-channel 32-bit DMA, two serial ports, and a 16-bit timer in a single 144-LQFP package cuts the part count and board area needed for a POS controller. The 16 MHz clock is adequate for transaction processing, while DMA handles printer data streams and serial peripherals without CPU overhead. The 5V supply matches legacy POS power rails. The 'E' (RoHS/lead-free) suffix enables compliance with current EU regulations for retail equipment. The MC68340 family has been deployed in POS systems for decades, so supply-chain maturity and software reuse are well-established. With End-of-Life announced, retailers should plan multi-year spares via authorized suppliers.
Recommended
Factory Automation and Robotics
The MC68340CAG16E applies to factory automation because the CPU32 core at 16 MHz executes deterministic control loops, while the 2-channel DMA and 16-bit timer integrate motion-control data acquisition without external glue logic. The System Integration Block generates chip-select signals to interface to ADC/DAC converters and motor-driver peripherals typical in industrial robot controllers. The 144-LQFP package withstands standard factory reflow and includes the exposed thermal pad option for better heat dissipation at higher clock rates. Real-time responsiveness is guaranteed since M68000-family cores have well-known interrupt latency profiles. For modernization projects, the MC68340 remains a viable building block - especially when reusing existing M68000 software - although new designs should evaluate ColdFire successors.
Recommended
Medical Instrumentation (Legacy Maintenance)
The MC68340CAG16E is well suited to legacy medical instrument maintenance because many regulatory-cleared designs from the late 1990s and 2000s use the MC68340 platform, and its M68000 object-code compatibility allows straightforward firmware reuse. The 5V supply matches legacy analog front-end rails, while the integrated DMA and timers drive ultrasound or patient-monitoring data paths. RoHS/lead-free compliance (the 'E' suffix) supports compliance for medical devices distributed globally. As the part is now in End-of-Life per NXP, medical OEM service organizations should leverage Rochester Electronics or qualified aftermarket suppliers for multi-decade spare-part provisioning. Verification of RoHS documentation and traceability records remains essential for FDA/IEC 60601-compliance maintenance.
Recommended
Embedded Networking Devices
The MC68340CAG16E fits embedded networking devices because the dual DMA channels can simultaneously service inbound packet buffers and outbound serial links while the CPU32 executes protocol state machines at 16 MHz. The Dual Serial Module provides two UART/USART channels for RS-232/RS-485 modem or console interfaces common in network equipment front panels. The 144-LQFP package enables compact board layouts typical of mid-range routers and gateways. The M68000 object-code compatibility supports legacy code reuse from previous generation embedded networking designs. ColdFire successors are recommended for new designs, but the MC68340 remains a reliable workhorse for legacy gateway and router SKUs.
Recommended
Recommended Products Summary
Engineering reference data for MC68340CAG16E — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | MC68340CAG20E | MC68340CAG25E | MC68331CAG16 | MC68340CAG16 | MC68340CFC16E |
|---|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors (legacy process) | NXP Semiconductors |
| Package | 144-LQFP | 144-LQFP - same | 144-LQFP - same | 144-LQFP - same | 144-LQFP - same | 144-LQFP - same |
| Operating Frequency | 16 MHz | 20 MHz (+25%) | 25 MHz (+56%) | 16 MHz (same) | 16 MHz (same) | 16 MHz (same) |
| Core Architecture | CPU32 (M68000) | CPU32 (same) | CPU32 (same) | CPU32 (same) | CPU32 (same) | CPU32 (same) |
| DMA Channels | 2 x 32-bit DMA | 2 x 32-bit DMA (same) | 2 x 32-bit DMA (same) | No DMA block | 2 x 32-bit DMA (same) | 2 x 32-bit DMA (same) |
| Supply Voltage | 5 V | 5 V (same) | 5 V (same) | 5 V (same) | 5 V (same) | 5 V (same) |
| RoHS / Lead Free | RoHS Compliant (E suffix) | RoHS Compliant (E suffix) | RoHS Compliant (E suffix) | RoHS Compliant | Non-E lead-free legacy (compatibility differs) | RoHS Compliant (E suffix) |
Key Differentiators
- Integrated dual-channel 32-bit DMA on the M68000 core (vs MC68331CAG16)
- Mainstream 16 MHz speed grade with full RoHS compliance (vs MC68340CAG16 (legacy non-E variant))
- M68000 object-code compatibility preserved (vs ColdFire successors (e.g. MCF5208))
Design Notes
Estimated: At 5V supply, 16 MHz, the MC68340CAG16E core can draw on the order of 80-150 mA active current under typical workloads. Power dissipation therefore ranges roughly 0.4-0.75 W, well within the 144-LQFP thermal envelope. For designs operating at the upper 25 MHz speed grade (MC68340CAG25E), re-evaluate thermal headroom and provide copper pours on inner PCB layers if the device is mounted near other heat sources. The 144-LQFP offers reasonable thermal resistance but no exposed pad.
Place decoupling capacitors (0.1 uF ceramic in parallel with 10 uF tantalum or electrolytic) within 5 mm of each VCC/GND pin pair to suppress switching noise. The 144-LQFP package has VCC/GND pins distributed around the periphery - take advantage of multiple supply pins by connecting each to its own local decoupling network. Keep high-speed signals (R/W, AS, DS, DSACKx) routed short with a ground reference plane to preserve bus timing margins. The MC68340 family has well-defined bus timing; consult the NXP MC68340 user manual for AC specification setup/hold times.
Do not confuse the MC68340CAG16E (with DMA) with the MC68331CAG16 (no DMA block). Both share the same 144-LQFP footprint but the on-chip peripheral set differs in DMA - software that relies on the DMA channels of the MC68340 will not work on the MC68331. Also verify the 'E' suffix (lead-free / RoHS) versus legacy 'non-E' (non-RoHS) variants when sourcing for compliant products. The MSL 3 floor life of 168 hours means dry-pack handling is required for SMD assembly; bake the part before reflow if moisture exposure exceeds the floor life.
The 144-LQFP lead pitch is 0.5 mm - PCB land patterns must follow IPC-7351 nominal-density footprints with a 0.3 mm stencil aperture for solder paste. Traces exiting the pin field should be designed with controlled impedance to avoid reflections on the external bus. The MC68340 can interface to 8-bit or 16-bit external data ports; whichever you choose, route the upper byte strobes (DSACK0/DSACK1) and byte-write enables (WE0/WE1) with matched lengths. A solid ground plane beneath the part helps both power integrity and EMI.
The MC68340CAG16E's external memory bus uses a multiplexed address/data protocol only when DSACK is asserted externally; in many designs the bus is demulted with latches. Keep the address/data traces short and parallel for matched impedance. If your design drives long memory backplanes, add bus buffers to stay within the MC68340's drive capability. RESET and HALT pins are open-drain on many configurations - wire these with external pullups to 5V. For system bring-up, monitor the reset-time AC specification (typically 1.5 CPU clocks minimum).
Compliance Information
RoHS compliant and lead free per Digchip and Rochester Electronics listings. REACH Unaffected per GlobalSpec Rochester Electronics product details. AEC-Q100 not applicable - this is a processor IC, not an automotive-grade part. Halogen-free and conflict-minerals status not explicitly stated in the verified data.
