PIC18F27K42-I/SO - 64MHz 8-Bit 128KB Flash MCU | Microchip
MPN: PIC18F27K42-I/SO ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $3.39 | $3.39 |
| 10 | $3.05 | $30.50 |
| 100 | $2.62 | $262.00 |
| 500 | $2.21 | $1,105.00 |
| 1,000 | $1.95 | $1,950.00 |
PIC18F27K42-I/SO Overview
A microcontroller (MCU) is a single-chip computer that integrates a CPU core, non-volatile program memory (Flash), volatile working memory (RAM), small EEPROM for data retention, plus a configurable set of digital and analog peripherals. The PIC18 family is Microchip's 8-bit RISC architecture with a 16-bit instruction word, optimized for deterministic real-time control. Within the broader taxonomy: PIC18 -> 8-bit MCU -> microcontroller -> embedded computing -> semiconductor. The K42 sub-family extends the PIC18 line with hardware CIPs such as CLC, PWM, NCO and Configurable Logic Cell, enabling complex timing and signal conditioning without CPU intervention.
Key features include a 12-bit ADC with Computation (ADC2) supporting up to 35 external channels with automated oversampling and averaging, a 10-bit DAC, two rail-to-rail op-amps usable in sleep mode, a hardware CVD (Capacitive Voltage Divider) for mTouch capacitive touch sensing, multiple UART/SPI/I2C peripherals, and Microchip's Peripheral Pin Select (PPS) for flexible I/O mapping. The integrated charge pump improves ADC performance at low VDD.
The architecture is built around a 16-bit instruction path with an 8-bit data bus, 31-level hardware stack, and vectored interrupt controller. Power management includes Idle and Sleep modes with retention, an RTC with VBAT support via a dedicated RTCC pin, and typical Sleep currents measured in the sub-microamp range when using the on-chip low-power brown-out reset (LPBOR).
Typical applications include IoT sensor nodes, home appliances and white goods, industrial control and HMI, battery-powered handheld instruments, capacitive touch user interfaces, and low-cost BLDC or stepper motor control. The XLP feature set also suits energy-harvesting and remote-control products where Sleep-mode current dominates battery life.
Designers should plan for VDD decoupling of at least 100 nF plus 1 uF near the supply pins, and follow Microchip's recommended ICSPTM layout for in-circuit programming. The 28-SOIC variant (-I/SO suffix) trades thermal dissipation for board density; designs drawing more than 100 mA continuous per supply pin should evaluate the QFN/MLF package for improved theta-JA.
This page synthesizes distributor pricing, drop-in 28-SOIC alternatives within the PIC18FxxK42 family, and practical design notes not duplicated in the manufacturer datasheet.
Drop-in alternatives for PIC18F27K42-I/SO — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC18F27K42-I/SO (same form factor and footprint) — differing in Package, Core Architecture, Operating Temperature, Program Memory (Flash), ADC.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC18F26K42-I/SO
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$1.43 / Unit
View Datasheet →PIC18F25K42-I/SO
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$1.82 / Unit
View Datasheet →PIC18F46K42-I/SO
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
PIC18F26Q84-I/SO
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$2.65 / Unit
View Datasheet →PIC18F25Q43-I/SO
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$1.21 / Unit
View Datasheet →PIC18F27K42-I/SO Maximum Ratings & Electrical Characteristics
| Core Architecture | PIC18, 8-bit RISC, 16-bit instruction word |
| Family | PIC18FxxK42 (XLP, Core Independent Peripherals) |
| Maximum CPU Frequency | 64 MHz |
| Flash Program Memory | 128 KB (64K x 16 words) |
| SRAM | 8 KB |
| EEPROM | 1 KB |
| Package | 28-pin SOIC (SO) |
| Operating Temperature | -40C to +85C (Industrial, -I) |
| Supply Voltage (VDD) | 2.3 V to 5.5 V (charge pump supports low-V operation) |
| ADC | 12-bit ADC2 with computation, up to 35 external channels |
| DAC | 10-bit |
| Op-Amps | 2x rail-to-rail, capable of operation in Sleep |
| Capacitive Touch | Hardware CVD (mTouch) |
| Peripheral Pin Select (PPS) | Yes, on most digital peripherals |
| Programming/Debug | ICSP, supports in-circuit programming and debugging |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
PIC18F27K42-I/SO Pin Configuration
| Pin 1 | RA5 — I/O port A bit 5 / ADC input |
| Pin 2 | RA4 — I/O port A bit 4 |
| Pin 3 | RA3 — I/O port A bit 3 |
| Pin 4 | RA2 — I/O port A bit 2 |
| Pin 5 | RA1 — I/O port A bit 1 / OPA1IN+ reference |
| Pin 6 | RA0 — I/O port A bit 0 / OPA1IN- |
| Pin 7 | VSS — Ground reference |
| Pin 8 | VDD — Positive supply voltage |
| Pin 9 | RA7 — I/O port A bit 7 / OPA2OUT |
| Pin 10 | RA6 — I/O port A bit 6 / OPA2IN- |
| Pin 11 | RC5 — I/O port C bit 5 / SOSCO crystal |
| Pin 12 | RC4 — I/O port C bit 4 / SOSCI crystal |
| Pin 13 | RC3 — I/O port C bit 3 / SCL1 |
| Pin 14 | RC2 — I/O port C bit 2 / SDA1 |
| Pin 15 | RC1 — I/O port C bit 1 / CCP6 |
| Pin 16 | RC0 — I/O port C bit 0 |
| Pin 17 | OSC1 — Crystal oscillator input / CLKIN |
| Pin 18 | OSC2 — Crystal oscillator output |
| Pin 19 | VSS — Ground reference |
| Pin 20 | VDD — Positive supply voltage |
| Pin 21 | RB7 — I/O port B bit 7 / ICSPDAT |
| Pin 22 | RB6 — I/O port B bit 6 / ICSPCLK |
| Pin 23 | RB5 — I/O port B bit 5 |
| Pin 24 | RB4 — I/O port B bit 4 |
| Pin 25 | RB3 — I/O port B bit 3 |
| Pin 26 | RB2 — I/O port B bit 2 |
| Pin 27 | RB1 — I/O port B bit 1 |
| Pin 28 | RB0 — I/O port B bit 0 / INT0 |
Typical Applications
PIC18F27K42-I/SO is suitable for 7 applications: IoT Sensor Nodes, Home Appliance Control, Capacitive Touch HMI, Industrial Control Modules, Battery-Powered Handheld Instruments, Low-Cost BLDC / Stepper Motor Drive, Smart Remote Control / Energy-Harvesting Switches.
IoT Sensor Nodes
The PIC18F27K42-I/SO fits battery-powered IoT sensor nodes where Sleep-mode current dominates energy budget. The XLP platform delivers sub-uA Sleep current with RTC retention, while the 12-bit ADC2 with computation automates oversampling and threshold detection without waking the CPU. Its 128 KB Flash accommodates TLS-style stacks or LoRaWAN firmware, and the 64 MHz performance lets the node process, encrypt, and transmit within a short active window, preserving battery life across months of unattended operation.
Recommended
Home Appliance Control
In washing machines, dishwashers, and white-goods control boards, the PIC18F27K42-I/SO provides the motor-control timing, user-interface scanning, and safety monitoring required by modern appliances. The two on-chip op-amps interface directly with current-sense shunts, while the hardware CVD mTouch peripheral implements capacitive buttons and sliders on glass front panels. PPS remapping simplifies PCB routing when a layout change is required late in the design cycle.
Recommended
Capacitive Touch HMI
The PIC18F27K42-I/SO is a strong fit for capacitive touch human-machine interfaces because the mTouch CVD module automates touch sampling, baseline tracking, and noise immunity on up to 35 channels. Designers combine the CVD with the on-chip 12-bit ADC2 to implement sliders, wheels, and proximity sensors behind glass or plastic overlays, while PPS routes the host UART or I2C interface to the most convenient physical pins without re-routing the board.
Recommended
Industrial Control Modules
Industrial control PLCs and remote I/O modules benefit from the PIC18F27K42-I/SO's industrial -40C to +85C rating, hardware CIP peripherals, and 5.5 V tolerant I/O for direct interface to 24 V logic via external protection. The CLC (Configurable Logic Cell) and PWM modules implement custom signal conditioning, while the ADC2 with computation handles sensor linearization in hardware. UART/SPI/I2C peripherals enable Modbus, RS-485, or proprietary fieldbus communication stacks.
Recommended
Battery-Powered Handheld Instruments
Handheld multimeters, barcode scanners, and portable test instruments rely on the PIC18F27K42-I/SO for low-power measurement with responsive user feedback. The 12-bit ADC2 drives sensor front-ends, the integrated op-amps condition signals before digitization, and the CLC peripheral combines timing edges for trigger detection. Sleep current in the sub-uA range and fast wake-up time enable months of standby on two AA cells while the 64 MHz CPU delivers instant measurement results.
Recommended
Low-Cost BLDC / Stepper Motor Drive
For small fans, pumps, and stepper drives, the PIC18F27K42-I/SO provides the complementary PWM outputs, hardware dead-band control, and fault shutdown inputs needed for sensorless or hall-sensor BLDC commutation. The 64 MHz CPU executes field-oriented control loops with sufficient headroom for the 12-bit ADC2 to sample phase currents. PPS allows designers to remap PWM and ADC channels to optimize PCB layout for high-current switching paths.
Recommended
Smart Remote Control / Energy-Harvesting Switches
Energy-harvesting wireless switches and remote controls use the PIC18F27K42-I/SO with its integrated LPBOR and sub-uA Sleep modes to transmit on each press from harvested kinetic or RF energy. The integrated op-amps condition the energy-harvesting source, and the CLC peripheral implements wake-on-event logic without CPU involvement. PPS lets designers reuse the same firmware across multiple pinout variants of the same remote platform.
Recommended
Recommended Products Summary
Engineering reference data for PIC18F27K42-I/SO — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC18F26K42-I/SO | PIC18F25K42-I/SO | PIC18F46K42-I/SO | PIC18F26Q84-I/SO | PIC18F25Q43-I/SO |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 28-SOIC (SO) | 28-SOIC (SO) | 28-SOIC (SO) | 28-SOIC (SO) | 28-SOIC (SO) | 28-SOIC (SO) |
| Flash Memory | 128 KB | 64 KB | 32 KB | 128 KB | 64 KB | 32 KB |
| SRAM | 8 KB | 8 KB | 2 KB | 8 KB | 8 KB | 2 KB |
| EEPROM | 1 KB | 1 KB | 1 KB | 1 KB | 1 KB | 256 B |
| Maximum CPU Frequency | 64 MHz | 64 MHz | 64 MHz | 64 MHz | 64 MHz | 64 MHz |
| ADC Resolution | 12-bit ADC2 (35 channels) | 12-bit ADC2 | 12-bit ADC2 | 12-bit ADC2 | 12-bit ADC2 | 12-bit ADC2 |
| Hardware Touch (CVD) | Yes (mTouch CVD) | Yes | Yes | Yes | Yes | Yes |
| Op-Amps On-Chip | 2 (rail-to-rail) | 2 | 2 | 2 | 2 | 2 |
| Operating Voltage | 2.3 V to 5.5 V | 2.3 V to 5.5 V | 2.3 V to 5.5 V | 2.3 V to 5.5 V | 2.3 V to 5.5 V | 2.3 V to 5.5 V |
Key Differentiators
- Largest Flash memory within the 28-pin K42 family (vs PIC18F26K42-I/SO)
- Doubles SRAM versus lower-density K42 cousins (vs PIC18F25K42-I/SO)
- Industrial temperature range (-40C to +85C) in 28-SOIC (vs PIC18F27K42-E/SO)
- Pin-to-pin migration path within the K42/Q43/Q84 families (vs PIC18F26Q84-I/SO)
Design Notes
Place a 100 nF ceramic decoupling capacitor within 3 mm of each VDD pin (pins 8 and 20 on the 28-SOIC) and a single 1 uF to 10 uF bulk capacitor on the same supply rail. The K42's charge pump draws brief current pulses during ADC operation, so low-ESR ceramic decoupling is critical to avoid ADC reference droop and noisy conversions. VSS pins must connect to a continuous ground pour for thermal and EMI reasons.
The 28-SOIC package has a higher junction-to-ambient thermal resistance (theta-JA approximately 80 C/W on a 1 sq inch 2-layer board) than the 28-QFN variant. At 64 MHz and full peripheral activity, internal power dissipation is typically below 50 mW so the SO part is adequate. For designs drawing continuous heavy GPIO current or operating in enclosed housings above 70 C ambient, evaluate the 28-QFN (PIC18F27K42-I/ML) for lower theta-JA.
Keep the ICSPTM lines (RB6/ICSPCLK and RB7/ICSPDAT) accessible for in-circuit programming and debugging. Route them to a 0.1 inch header or test pads and do not place any capacitor or pull-down on ICSPCLK that exceeds 10 pF to ground, or programming may fail. For production programming, follow Microchip's recommended 5-wire ICSP layout (VDD, VSS, ICSPCLK, ICSPDAT, MCLR) including the high-voltage entry sequence on MCLR.
Use the Peripheral Pin Select (PPS) feature to route UART, SPI, I2C, and PWM peripherals to convenient physical pins rather than reshaping the PCB. Keep analog input traces short and away from PWM outputs and switching nodes; the 12-bit ADC2 with computation can be degraded by digital switching noise coupling through the SOIC pin-to-pin capacitance. A ground guard ring around the ADC inputs is recommended for precision measurements.
Do not assume the K42 family includes USB or CAN peripherals - they do not. For USB, step up to the PIC18F27J53 family; for CAN, use the PIC18F26K80 family. Also note that PIC18F27K42 and PIC18F46K42 share the same K42 silicon but differ in pin count - if migrating from a 28-pin to a 40-pin design, recompile firmware for the new PPS mappings rather than reusing the same configuration.
Compliance Information
RoHS and REACH compliance per Microchip product page. Industrial grade (-I) is not AEC-Q100 automotive qualified; the automotive equivalent is the PIC18F27K42-I/SO VAO or a -Q variant. Microchip participates in the Conflict-Free Smelter program (CFSI).
