PIC18LF26J50T-I/SO - 64KB Flash USB MCU 28-SOIC | Microchip
MPN: PIC18LF26J50T-I/SO ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $5.12 | $5.12 |
| 10 | $4.62 | $46.20 |
| 100 | $3.85 | $385.00 |
| 500 | $3.32 | $1,660.00 |
| 1,000 | $2.96 | $2,960.00 |
PIC18LF26J50T-I/SO Overview
The PIC18 microcontroller family is an 8-bit Harvard-architecture RISC MCU line widely used in cost-sensitive embedded designs. The 18J sub-family specifically adds Full-Speed USB hardware on-chip, eliminating the need for an external PHY. Within the broader taxonomy, a PIC18 sits beneath the umbrella of "microcontroller" -> "8-bit MCU" -> "embedded controller" -> "semiconductor IC", and the 18J series occupies the middle of the PIC18 performance range, balancing USB connectivity with low power.
Key differentiating features include 64 KB self-programmable Flash with 1 KB of dedicated EEPROM, a CTMU (Charge Time Measurement Unit) for capacitive touch and time-of-flight sensing, an enhanced instruction set with 16-bit instructions, and nanoWatt XLP power management with multiple deep-sleep modes. The integrated USB 2.0 Full-Speed transceiver with on-chip voltage regulator streamlines USB device designs without external crystals for low-speed/full-speed bus operation.
Architecturally, the PIC18LF26J50T uses a modified Harvard core with a 16-bit instruction word and an 8-bit data path, two 31-level hardware stacks, and a vectored interrupt controller with two priority levels. The 28-SOIC package exposes up to 21 general-purpose I/O pins through peripheral pin select (PPS-less, fixed-pin) mappings and supports In-Circuit Serial Programming (ICSP) and In-Circuit Debug (ICD) via the standard Microchip two-wire interface.
Typical applications include USB HID peripherals (mice, keyboards, custom input devices), USB-to-UART bridges, low-cost data loggers, sensor front-ends with capacitive touch, and battery-powered industrial sensors. The wide industrial temperature range and nanoWatt XLP modes make the part suitable for unattended remote nodes.
Designers should note that the LF (low-voltage) core limits VDD to 2.0–3.3 V; designs requiring 5 V operation must select the non-LF "PIC18F26J50T-I/SO" sibling. The internal voltage regulator for USB requires a 5 V tolerant VBUS rail via an internal charge pump - consult the datasheet's USB section for the required capacitor network on VUSB/VCAP pins.
This page synthesizes distributor pricing, drop-in alternatives within the same 28-SOIC footprint, and practical design notes covering the USB regulator network, low-power sleep mode selection, and ICSP/ICD pin allocation not found in the manufacturer datasheet.
Drop-in alternatives for PIC18LF26J50T-I/SO — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC18LF26J50T-I/SO (same form factor and footprint) — differing in Core Architecture, Package, Operating Temperature, RoHS Status, ADC.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC18LF26J50-I/SO
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
PIC18F26J50T-I/SO
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$4.1 / Unit
View Datasheet →PIC18F26J50-I/SO
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
PIC18LF25J50T-I/SO
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$3.05 / Unit
View Datasheet →PIC18LF25K50T-I/SO
✅ Drop-In✓ In Stock
$2.18 / Unit
View Datasheet →PIC18LF26J50T-I/SO Maximum Ratings & Electrical Characteristics
| Product Series | PIC® 18J |
| Core Architecture | 8-bit PIC RISC (Harvard) |
| Program Memory | 64 KB Flash |
| RAM | 4 KB |
| Maximum CPU Frequency | 48 MHz (12 MIPS) |
| Supply Voltage (VDD) | 2.0 V to 3.6 V |
| USB Interface | USB 2.0 Full-Speed Device/Host/OTG (on-chip transceiver) |
| I/O Pins | 21 (estimated from 28-SOIC pinout) |
| ADC | 10-bit, up to 13 channels |
| Analog Comparators | 2 |
| CCP / ECCP Modules | 2 |
| CTMU | Yes (Charge Time Measurement Unit) |
| nanoWatt XLP | Yes |
| Operating Temperature | -40 °C to +85 °C (Industrial) |
| Package | 28-SOIC (0.295 in / 7.50 mm width) |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
| Programming / Debug | ICSP + ICD (2-wire) |
| Packaging Form | Tape & Reel (T suffix) |
PIC18LF26J50T-I/SO Pin Configuration
| Pin 1 | MCLR — Master Clear (reset) input, active low; requires pull-up for normal operation |
| Pin 2 | RA0 — Port A bit 0 / analog input |
| Pin 3 | RA1 — Port A bit 1 / analog input |
| Pin 4 | RA2 — Port A bit 2 / analog input |
| Pin 5 | RA3 — Port A bit 3 / analog input (also VREF+) |
| Pin 6 | RA4 — Port A bit 4 / analog input / Timer0 clock |
| Pin 7 | RA5 — Port A bit 5 / analog input |
| Pin 8 | VSS — Ground reference |
| Pin 9 | RA7 — Port A bit 7 / oscillator pin |
| Pin 10 | RA6 — Port A bit 6 / oscillator pin |
| Pin 11 | RC0 — Port C bit 0 |
| Pin 12 | RC1 — Port C bit 1 |
| Pin 13 | VCAP — Internal 3.3 V regulator output capacitor |
| Pin 14 | VUSB — USB internal regulator input (5 V from VBUS) |
| Pin 15 | D- — USB D- data line |
| Pin 16 | D+ — USB D+ data line |
| Pin 17 | RC2 — Port C bit 2 |
| Pin 18 | RC3 — Port C bit 3 |
| Pin 19 | VSS — Ground reference |
| Pin 20 | VDD — Positive supply voltage (2.0–3.6 V) |
| Pin 21 | RB0 — Port B bit 0 / interrupt-on-change |
| Pin 22 | RB1 — Port B bit 1 / interrupt-on-change |
| Pin 23 | RB2 — Port B bit 2 / interrupt-on-change |
| Pin 24 | RB3 — Port B bit 3 / interrupt-on-change |
| Pin 25 | RB4 — Port B bit 4 / interrupt-on-change |
| Pin 26 | RB5 — Port B bit 5 / interrupt-on-change |
| Pin 27 | PGC — Port B bit 6 / ICSP clock (ICD programming) |
| Pin 28 | PGD — Port B bit 7 / ICSP data (ICD programming) |
Typical Applications
PIC18LF26J50T-I/SO is suitable for 6 applications: USB HID Peripheral Devices, USB-to-UART / USB-to-SPI Bridge, Capacitive Touch Sensor Front-End, Low-Power Data Logger, Industrial Sensor Hub with USB Diagnostics, USB Custom Class Device (Vendor-Specific).
USB HID Peripheral Devices
The PIC18LF26J50T-I/SO is ideal for USB Human Interface Device (HID) peripherals such as custom keyboards, mice, game controllers, and presentation remote controls. The integrated Full-Speed USB 2.0 transceiver eliminates external PHY cost and the 64 KB Flash plus 4 KB RAM are sufficient for HID class descriptors plus application logic. Microchip's free USB stack and HID bootloader occupy roughly 20 KB of Flash, leaving headroom for firmware features. The 28-SOIC footprint simplifies hand assembly for low-volume HID products, and the nanoWatt XLP modes allow battery-powered HID designs drawing micro-amps in suspend. Engineers should follow Microchip AN1199 (USB CDC/HID on PIC18) for descriptor templates and bus-powered suspend current budgeting to stay within USB 2.0 spec limits.
Recommended
USB-to-UART / USB-to-SPI Bridge
Using the on-chip USB transceiver and a software USB-CDC or USB-MSC stack, the PIC18LF26J50T-I/SO can implement a low-cost USB-to-UART or USB-to-SPI bridge for legacy equipment modernization. The PIC18 EUSART plus MSSP peripheral handles asynchronous serial and SPI/I2C, and the 48 MHz core keeps UART error rates low at common baud rates up to 921600 bps. The industrial -40 °C to +85 °C range covers factory-floor and outdoor bridge installations. Designers should enable the 48 MHz PLL mode for accurate USB clocking and add proper ESD protection (USBLC6-2SC6 or equivalent) on D+/D- lines for ruggedized industrial deployments per Microchip AN1295 (USB embedded design guidelines).
Recommended
Capacitive Touch Sensor Front-End
The PIC18LF26J50T-I/SO's integrated CTMU (Charge Time Measurement Unit) enables robust capacitive touch sensing for buttons, sliders, and proximity sensors without an external touch IC. Combined with the 10-bit ADC and 13 analog channels, the MCU can scan a 12-key matrix with hardware-driven timing rather than software loops, freeing CPU cycles for communication. The nanoWatt XLP deep-sleep mode allows battery-powered touch wake-up applications that spend most of their life in sub-µA sleep. Application note AN1250 (Microchip mTouch™ CTMU) provides reference C code for button debounce and slider interpolation, and the SOIC-28 footprint leaves enough GPIO for status LEDs and a host interface.
Recommended
Low-Power Data Logger
The PIC18LF26J50T-I/SO suits battery-powered data loggers that periodically wake to sample sensors, write to external EEPROM or Flash, and return to deep sleep. The 4 KB RAM buffers 1 ksps ADC bursts between wake events, and the RTCC with dedicated 32 kHz crystal keeps wall-clock time across multi-month deployments. Total quiescent draw below 1 µA in sleep with RTCC active makes 1-year+ battery life feasible on a single CR2032 for low-rate logging (one sample per minute). The USB transceiver doubles as the data-extraction port when the user plugs into a host, avoiding a separate UART connector. Designers should consult Microchip AN1416 (Low-Power Design with PIC MCUs) for sleep-mode selection and brown-out reset thresholds.
Recommended
Industrial Sensor Hub with USB Diagnostics
The PIC18LF26J50T-I/SO acts as a sensor hub reading analog/digital inputs and exposing them over USB to a host PC for diagnostics, calibration, and field service. The two analog comparators handle threshold alarms without ADC wake-up, and the ECCP modules can drive PWM outputs for proportional control. The industrial -40 °C to +85 °C temperature grade and the wide-pin SOIC-28 footprint suit DIN-rail-mounted industrial enclosures. With proper TVS protection on USB and external I/O, this MCU can survive the surge and ESD events common in motor-control cabinets. Reference Microchip's AN1078 (USB firmware upgrade over USB) for field-update capability.
Recommended
USB Custom Class Device (Vendor-Specific)
For vendor-specific USB devices such as lab instruments, programming tools, and test fixtures, the PIC18LF26J50T-I/SO offers the Full-Speed USB bandwidth and sufficient Flash for custom protocol stacks. The 64 KB Flash accommodates vendor-class descriptors plus proprietary command handlers, while the 12 MIPS core sustains bulk-transfer throughput without dropping packets. The industrial temperature grade plus standard Microchip longevity program makes this part viable for 10+ year product cycles in lab and test gear. Use the Microchip USB Framework (MCHPFSUSB) as a starting point and customize the vendor request handlers for proprietary commands; this approach is documented in AN1166 (USB vendor-class on PIC18).
Recommended
Recommended Products Summary
Engineering reference data for PIC18LF26J50T-I/SO — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC18LF26J50-I/SO | PIC18F26J50T-I/SO | PIC18F26J50-I/SO | PIC18LF25J50T-I/SO | PIC18LF25K50T-I/SO |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 28-SOIC (7.50 mm) | 28-SOIC - same | 28-SOIC - same | 28-SOIC - same | 28-SOIC - same | 28-SOIC - same |
| Program Memory (Flash) | 64 KB | 64 KB - same | 64 KB - same | 64 KB - same | 32 KB (-50%) | 32 KB (-50%) |
| RAM | 4 KB | 4 KB - same | 4 KB - same | 4 KB - same | 2 KB (-50%) | 2 KB (-50%) |
| VDD Range | 2.0 V to 3.6 V (LF core) | 2.0–3.6 V - same | 2.0–3.3 V (F core, 5 V tolerant I/O) | 2.0–3.3 V (F core) | 2.0–3.6 V - same | 2.0–3.6 V - same |
| USB Interface | USB 2.0 Full-Speed Device/Host/OTG | Same | Same | Same | Same | Same |
| Core Architecture | PIC18 RISC 48 MHz / 12 MIPS | Same | Same | Same | Same | PIC18 K-series (newer core with HW divider) |
| Industrial Temperature | -40 °C to +85 °C | -40 °C to +85 °C - same | -40 °C to +85 °C - same | -40 °C to +85 °C - same | -40 °C to +85 °C - same | -40 °C to +85 °C - same |
Key Differentiators
- Largest Flash and RAM in 28-SOIC PIC18 J-series USB line (vs PIC18LF25J50T-I/SO)
- On-chip CTMU for capacitive touch without external IC (vs PIC18LF14K50T-I/SO)
- LF core variant for low-voltage-only designs (vs PIC18F26J50T-I/SO)
Design Notes
The PIC18LF26J50T-I/SO requires a 2.0–3.6 V supply on VDD (pin 20) with VSS (pins 8 and 19) tied to ground. The USB internal 3.3 V regulator draws from VUSB (pin 14, supplied from 5 V VBUS) and requires a decoupling capacitor on VCAP (pin 13). Estimated: total quiescent current in sleep with RTCC active is below 1 µA at 3.3 V; in full-speed USB active mode the part draws approximately 15–20 mA at 48 MHz. Add a ferrite bead or small L-C filter on VUSB if the upstream VBUS rail is noisy.
Do not connect VBUS (5 V) directly to VDD on the LF core variant - the LF core is only rated to 3.6 V on VDD. Use the internal USB regulator (VUSB → VCAP) for the USB transceiver and supply VDD separately from a 3.3 V regulator (MCP1700 or similar). When migrating from the F-core PIC18F26J50, double-check that any 5 V signal connected to a digital input is within the LF core's VDD + 0.3 V absolute-maximum spec to avoid latch-up. The MCLR pin (1) needs a 10 kΩ pull-up to VDD and a 100 nF to ground for proper reset behavior; do not leave MCLR floating.
Place the 100 nF VDD decoupling capacitor within 5 mm of pin 20, and the VCAP capacitor (typically 220 nF per Microchip AN587) within 5 mm of pin 13. The D+/D- traces (pins 15/16) must be routed as a 90 Ω differential pair with ground reference and length-matched to within 150 mil. Keep USB traces away from switching regulator or high-current signals to minimize EMI coupling. The 28-SOIC wide-body (7.50 mm) package allows generous trace routing underneath, but leave a ground pour stitched with vias around the MCU body for thermal dissipation and EMI shielding.
When using the 48 MHz primary oscillator for USB operation, route the crystal traces (RA6/RA7, pins 9/10) over a continuous ground plane and keep them short - under 10 mm crystal-to-pin trace length is recommended. Add 1 MΩ parallel load resistors across the crystal if the oscillator shows poor start-up behavior at cold temperatures. For high-EMI environments, place a small ferrite bead on VUSB between the upstream VBUS source and pin 14, and add a common-mode choke on the USB cable side per USB 2.0 compliance guidelines in AN1295.
Compliance Information
RoHS and REACH compliant per Microchip product page. Supplied in lead-free matte-tin finish. Sourced from RMI-compliant facilities. Not AEC-Q100 qualified - for automotive applications consult Microchip's AEC-Q100 PIC MCU portfolio.
