PIC24FJ128GB202-I/MM - 16-bit 32MHz USB MCU | Microchip
MPN: PIC24FJ128GB202-I/MM ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $7.2 | $7.20 |
| 10 | $6.5 | $65.00 |
| 100 | $5.78 | $578.00 |
| 500 | $5.18 | $2,590.00 |
| 1,000 | $4.65 | $4,650.00 |
PIC24FJ128GB202-I/MM Overview
A 16-bit microcontroller (MCU) is a programmable processor that fetches 16-bit-wide instructions and operates on 16-bit data paths, offering higher code density and arithmetic throughput than 8-bit MCUs while remaining easier to program than 32-bit devices. Microcontrollers belong to the broader category of embedded processors and system-on-chip (SoC) devices, which integrate CPU core, memory, and peripherals into a single silicon die. The PIC24FJ sits in Microchip's PIC24F sub-family, designed for general-purpose low-power applications, and uses the company's PIC modified Harvard RISC architecture.
Key features of the PIC24FJ128GB202-I/MM include 128 KB (43K x 24) self-programmable Flash with ECC, 8 KB SRAM, integrated USB 2.0 full-speed OTG with physical interface, a hardware AES/SHA crypto engine with secure key storage, four 16-bit timers, up to 21 GPIO, a 10-bit 1.1 Msps ADC with up to 9 channels, two UART, two SPI, and two I2C peripherals. The XLP Sleep mode draws as little as 20 nA typical, enabling coin-cell or energy-harvesting designs. The 28-pin QFN-S package exposes USB D+/D- lines and supports serial debugging via ICD/PGDx pins.
The device uses Microchip's modified Harvard architecture with a 16-bit data path and 24-bit instruction word. The 32 MHz oscillator with 4x phase-locked loop provides a 16 MIPS instruction rate at 3.3 V, with 2.0-3.6 V operation across the -40C to +85C industrial range. Peripherals are interconnected through a Peripheral Pin Select (PPS) remap matrix that allows flexible routing of digital functions to physical pins, simplifying PCB layout and BOM reuse across variants.
Typical applications include secure IoT sensors, USB medical peripherals, encrypted industrial HMI, smart meters with secure firmware update, biometric dongles, and secure wireless gateways. The crypto engine makes this part especially valuable for designs that must implement secure boot, encrypted firmware, or authenticated communication without an external security IC.
When designing with the PIC24FJ128GB202-I/MM, observe Microchip's recommended decoupling (100 nF + 1 uF) close to VDD pins and reserve the exposed pad (EP) for thermal and electrical connection to a continuous ground plane. Because of the device's USB OTG, follow USB-IF layout guidelines with a 90-ohm differential D+/D- trace match.
This page combines verified distributor pricing, pin-compatible drop-in alternatives, application notes, and design guidance synthesized from Microchip datasheets, DigiKey listings, and application notes - content not available on any single distributor page.
Drop-in alternatives for PIC24FJ128GB202-I/MM — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC24FJ128GB202-I/MM (same form factor and footprint) — differing in ADC, Package, Timers, Core Architecture, Crypto Engine.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC24FJ128GB202-E/MM
✅ Drop-In✓ In Stock
$4.1 / Unit
View Datasheet →PIC24FJ128GB202-I/MM Maximum Ratings & Electrical Characteristics
| Family | PIC24F XLP |
| Core | 16-bit PIC modified Harvard RISC |
| Maximum CPU Speed | 32 MHz (16 MIPS) |
| Program Flash | 128 KB (43K x 24) with ECC |
| SRAM | 8 KB |
| USB Interface | USB 2.0 Full-Speed OTG with on-chip transceiver |
| Crypto Engine | Hardware AES/SHA with secure key storage and RNG |
| Operating Voltage | 2.0 V to 3.6 V |
| Operating Temperature | -40C to +85C (Industrial) |
| Package | 28-pin QFN-S (6x6 mm) with exposed pad |
| Mounting Type | Surface Mount |
| ADC | 10-bit, up to 9 channels, 1.1 Msps |
| Timers | 4 x 16-bit |
| Communication | 2x UART, 2x SPI, 2x I2C |
| GPIO | Up to 21 |
| PPS (Peripheral Pin Select) | Yes |
| Sleep Current | 20 nA typical (XLP Sleep) |
| RoHS Status | Compliant |
| Lead-Free | Yes |
PIC24FJ128GB202-I/MM Pin Configuration
| Pin 1 | RB15/AN15/OCFB/CTED2/CN12/PMD5 — GPIO RB15 with ADC and PMP functions |
| Pin 2 | RB14/AN14/CN11/PMD4 — GPIO RB14 with ADC function |
| Pin 3 | RB13/AN13/CN10/PMD3 — GPIO RB13 with ADC function |
| Pin 4 | RB12/AN12/CN9/PMD2 — GPIO RB12 with ADC function |
| Pin 5 | RB11/AN11/CN8/PMD1 — GPIO RB11 with ADC function |
| Pin 6 | VBUS — USB VBUS sense input |
| Pin 7 | D+ — USB D+ differential data line |
| Pin 8 | D- — USB D- differential data line |
| Pin 9 | VUSB3V3 — USB 3.3V regulator output |
| Pin 10 | VDD — Core supply voltage |
| Pin 11 | VSS — Ground reference |
| Pin 12 | MCLR — Master clear / reset input (active low) |
| Pin 13 | OSC1/CLKI/RA3 — External oscillator input or GPIO |
| Pin 14 | OSC2/CLKO/RA2 — External oscillator output or GPIO |
| Pin 15 | PGEC1/AN1/CVREF/RA1 — ICSP clock / ADC / GPIO |
| Pin 16 | PGED1/AN0/CVREF-/RA0 — ICSP data / ADC / GPIO |
| Pin 17 | SDA1/RG3 — I2C1 data or GPIO |
| Pin 18 | SCL1/RG2 — I2C1 clock or GPIO |
| Pin 19 | INT0/RF6 — External interrupt 0 or GPIO |
| Pin 20 | RF5/CN17 — GPIO with change notification |
| Pin 21 | RF4/CN16 — GPIO with change notification |
| Pin 22 | RA4/TDI — JTAG TDI or GPIO |
| Pin 23 | RA5/TDO — JTAG TDO or GPIO |
| Pin 24 | RA6/TMS — JTAG TMS or GPIO |
| Pin 25 | RA7/TCK — JTAG TCK or GPIO |
| Pin 26 | AVDD — Analog supply voltage |
| Pin 27 | AVSS — Analog ground reference |
| Pin 28 | EP — Exposed pad - thermal/electrical ground, must be soldered to ground plane |
Typical Applications
PIC24FJ128GB202-I/MM is suitable for 6 applications: Secure IoT Sensor Node, USB Medical Peripherals, Encrypted Industrial HMI, Smart Metering with Secure Firmware Update, Biometric Security Dongles, Secure Wireless Gateways.
Secure IoT Sensor Node
The PIC24FJ128GB202-I/MM is a strong fit for battery-powered secure IoT sensors because it integrates a hardware AES/SHA crypto engine and a true random number generator while drawing as little as 20 nA in XLP Sleep mode. According to Microchip's product page, the on-chip crypto module enables secure boot and encrypted firmware update without an external ATECC608 security IC, reducing BOM and PCB area. The 32 MHz / 16 MIPS core can run TLS or LoRaWAN stacks in 128 KB Flash while keeping wake cycles short. Designers typically connect the device to a sub-GHz radio via SPI, run on a coin cell, and use the USB OTG port for secure firmware upgrade during manufacturing or service.
Recommended
USB Medical Peripherals
The PIC24FJ128GB202-I/MM's integrated USB 2.0 Full-Speed OTG controller with on-chip transceiver and USB-IF certification make it an excellent host for tethered medical peripherals such as glucose meters, pulse oximeters, and home-diagnostic dongles. According to Microchip datasheets, the on-chip pull-up/pull-down resistors and charge-pump support remove the need for external PHY components, shrinking board size. The hardware crypto engine allows authenticated data transfer to a host PC or tablet, while the 10-bit 1.1 Msps ADC captures analog signals from sensor front-ends. The 28-pin QFN-S package supports a small, sealed enclosure suitable for handheld medical devices.
Recommended
Encrypted Industrial HMI
For factory-floor human-machine interfaces, the PIC24FJ128GB202-I/MM provides the cryptography, USB, and low-power performance needed to build secure industrial panels. According to Microchip's product family documentation, the integrated AES/SHA engine supports secure operator authentication and signed firmware, while USB OTG enables field service via USB stick. The 32 MHz core drives LCD or segment displays and runs Microchip's USB Host stack for keyboard or barcode-scanner input. PPS remapping allows flexible PCB layout for crowded industrial enclosures, and the -40C to +85C industrial temperature rating suits typical factory environments.
Recommended
Smart Metering with Secure Firmware Update
The PIC24FJ128GB202-I/MM is well-suited for smart utility meters requiring secure firmware update and authenticated telemetry. According to Microchip's product page, the hardware AES/SHA engine provides message authentication for AMI protocols, and the integrated RNG supports key generation. The 128 KB Flash holds meter firmware plus optional DLMS/COSEM or wireless stacks, while 8 KB SRAM supports metering buffers. USB OTG is useful for field technicians performing local diagnostics, and the 28-pin QFN-S package fits compact meter form factors.
Recommended
Biometric Security Dongles
The PIC24FJ128GB202-I/MM's combination of USB OTG and hardware crypto is ideal for USB biometric security keys and authentication dongles. According to Microchip's product description, the integrated AES engine can perform FIDO2 or similar authentication exchanges entirely on-chip, while the on-chip USB transceiver eliminates external PHY cost. The 20 nA Sleep current supports battery-backed dongles that wake on host enumeration. With 128 KB Flash, designers have ample space for biometric templates and certificate chains.
Recommended
Secure Wireless Gateways
The PIC24FJ128GB202-I/MM serves as a low-power secure controller in edge wireless gateways bridging sensors to Wi-Fi, BLE, or LoRa hosts. According to Microchip's product family, the 16 MIPS core can manage cryptographic handshakes for BLE pairing or LoRaWAN activation while leaving the radio module to handle the PHY layer. USB OTG enables local configuration via USB stick or smartphone tether, and the 128 KB Flash holds gateway firmware plus TLS credentials. XLP Sleep mode minimizes standby current for battery-backed edge nodes.
Recommended
Recommended Products Summary
Engineering reference data for PIC24FJ128GB202-I/MM — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC24FJ128GB202-E/MM | PIC24FJ128GB202-I/SS | PIC24FJ128GA202-I/SS | PIC24FJ128GB110-I/PT |
|---|---|---|---|---|---|
| Package | 28-pin QFN-S (6x6 mm) | 28-pin QFN-S (6x6 mm) - same | 28-pin SSOP | 28-pin SSOP | 100-pin TQFP |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB |
| USB OTG | Yes (on-chip transceiver) | Yes | Yes | No | Yes |
| Crypto Engine | AES/SHA + RNG | AES/SHA + RNG | AES/SHA + RNG | No | AES/SHA + RNG |
| Max CPU Speed | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS |
| Temperature Range | -40C to +85C (Industrial) | -40C to +125C (Extended) | -40C to +85C | -40C to +85C | -40C to +85C |
| SRAM | 8 KB | 8 KB | 8 KB | 8 KB | 16 KB |
Key Differentiators
- Integrated hardware crypto engine (AES/SHA) + RNG eliminates external security IC (vs PIC24FJ128GA202-I/SS)
- USB 2.0 Full-Speed OTG with on-chip transceiver eliminates external PHY (vs PIC24FJ128GA010-I/PT)
- eXtreme Low Power Sleep at 20 nA typical extends battery life (vs PIC24FJ128GB110-I/PT)
Design Notes
Estimated: with VDD = 3.3 V, VBUS = 5 V, and average active current of 20 mA while USB is active, the device draws about 66 mW during USB transactions. In XLP Sleep at 20 nA typical, the part draws only 66 nW, enabling battery-backed designs with multi-year coin-cell life when wake intervals are properly managed. Use the VUSB3V3 pin to power the USB transceiver and decouple with 1 uF plus 100 nF ceramic capacitors per Microchip's hardware design checklist.
Route the USB D+ and D- traces as a 90-ohm differential pair with matched length, keep them short, and surround them with a continuous ground pour per USB-IF layout guidelines. Place the 28-pin QFN-S exposed pad on a continuous ground plane with at least 4 thermal vias to the internal ground layer for thermal and electrical performance. Decoupling capacitors (100 nF + 1 uF) should be placed within 3 mm of the VDD and AVDD pins.
Do not leave the USB VUSB3V3 pin undecoupled - the on-chip USB regulator requires a 1 uF ceramic cap for stability. Do not connect the JTAG TMS/TDI/TDO/TCK pins to anything else when not using JTAG, but reserve them as GPIO for production debugging. Failure to bond the QFN exposed pad to ground causes thermal stress and can compromise USB signal integrity due to floating substrate noise.
When using the on-chip crypto engine, ensure that sensitive AES keys are loaded via the secure key storage path - never expose them in Flash data memory. The integrated RNG should be seeded at least once per session to maintain entropy. PPS remapping allows digital peripherals to be moved to non-USB pins to avoid RF interference with the USB 2.0 D+/D- traces on dense boards.
Compliance Information
Industrial grade (I suffix, -40C to +85C). USB-IF certified per Microchip product page. RoHS and REACH compliant per Microchip product environmental documentation. AEC-Q100 not applicable for this part number - not automotive qualified.