PIC24HJ128GP202-E/SO - 16-bit 40MIPS MCU 128KB Flash 28-SOIC | Microchip
MPN: PIC24HJ128GP202-E/SO ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $7.45 | $7.45 |
| 10 | $6.71 | $67.10 |
| 100 | $5.96 | $596.00 |
| 500 | $5.36 | $2,680.00 |
| 1,000 | $4.78 | $4,780.00 |
PIC24HJ128GP202-E/SO Overview
A microcontroller (MCU) is a single-chip computer that integrates a CPU core, program and data memory, I/O peripherals, and often analog or communication blocks on one silicon die. The PIC24H family employs a 16-bit modified-Harvard architecture with a 24-bit instruction word, sitting in the hierarchy: PIC24H -> PIC24 family -> dsPIC DSC -> 16-bit microcontroller -> embedded MCU -> semiconductor. The architecture balances deterministic interrupt latency with high-throughput DSP-style computation, making the line a transitional point between classic 8-bit PIC MCUs and full dsPIC digital signal controllers.
Key features of the PIC24HJ128GP202 include 16-channel 10/12-bit ADC with 500 ksps conversion, two UART, two SPI, one I2C, up to 21 general-purpose I/O pins, a 16-bit timer/capture/compare/PWM block, and a direct memory access (DMA) controller with 8 channels. The device operates from 2.0 V to 3.6 V and includes an on-chip 8 MHz internal oscillator with PLL to generate the 40 MIPS instruction rate, plus JTAG and ICSP in-circuit debugging interfaces.
The PIC24HJ128GP202 architecture uses a single-cycle 16-bit ALU and hardware multiply/divide to deliver deterministic control loop performance. The DMA engine moves data between peripherals and memory without CPU intervention, freeing the core for application-level computation; combined with 128 KB Flash and 8 KB SRAM this enables moderate data-acquisition and motor-control workloads on-chip.
Typical applications include industrial motor control (BLDC, stepper, switched reluctance), digital power conversion (SMPS PFC and phase-shifted full-bridge), sensor signal conditioning, UPS and inverter controllers, and automotive body/comfort ECUs where the -E temperature grade is mandatory. The pin compatibility with the dsPIC33F family allows code migration when DSP extensions are later required.
When designing with this part, allocate the analog and digital supply pins (AVDD/AVSS) decoupling to a clean analog ground plane to preserve ADC accuracy, and consult Microchip's TB3138 application note for high-performance ADC layout guidelines. The extended temperature range and 128 KB Flash position this MCU for safety-margin industrial designs, while the SOIC-28 footprint simplifies hand prototyping and rework versus QFN packages.
This page synthesizes distributor pricing, pin-compatible drop-in alternatives across the PIC24H family, and practical design notes that go beyond the manufacturer datasheet summary, giving engineers a single source for evaluation and procurement.
Drop-in alternatives for PIC24HJ128GP202-E/SO — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC24HJ128GP202-E/SO (same form factor and footprint) — differing in Core Architecture, Package, Program Memory (Flash), Operating Temperature, Mounting Type.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC24HJ128GP202-I/SO
✅ Drop-In✓ In Stock
$4.62 / Unit
View Datasheet →PIC24HJ64GP202-E/SO
✅ Drop-In📋 Reference alternative (not in catalog)
PIC24HJ64GP204-E/SO
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
dsPIC33FJ128GP202-E/SO
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ64GP202-E/SO
✅ Drop-In✓ In Stock
$3.85 / Unit
View Datasheet →PIC24HJ128GP202-E/SO Maximum Ratings & Electrical Characteristics
| Core Architecture | PIC24H 16-bit modified-Harvard |
| Core Size | 16-bit data, 24-bit instruction word |
| Program Memory (Flash) | 128 KB (43K x 24 instruction words) |
| Data Memory (SRAM) | 8 KB |
| Maximum CPU Speed | 40 MIPS (at Fcy = 40 MHz) |
| Operating Voltage (VDD) | 2.0 V to 3.6 V |
| Operating Temperature Range | -40C to +125C (extended "E" grade) |
| I/O Pins | 21 (multiplexed) |
| ADC | 10/12-bit, up to 16 channels, 500 ksps |
| DMA Channels | 8 |
| UART | 2 |
| SPI | 2 |
| I2C | 1 |
| Timers (16-bit) | 5 with input capture/output compare/PWM |
| Package | 28-pin SOIC (SO) - 7.50 mm body width |
| Mounting Type | Surface Mount |
| On-chip Oscillator | 8 MHz internal with PLL |
| Debug Interface | JTAG / ICSP |
| MSL Level | 3 (168 hours) |
| RoHS Status | Compliant |
PIC24HJ128GP202-E/SO Pin Configuration
| Pin 1 | MCLR — Master Clear (reset) input, drive low to reset device |
| Pin 2 | RA0/AN0 — PORTA0 / Analog input 0 |
| Pin 3 | RA1/AN1 — PORTA1 / Analog input 1 |
| Pin 4 | RA2/AN2/OSC1/CLKI — PORTA2 / Analog input 2 / crystal oscillator input / external clock input |
| Pin 5 | RA3/AN3/OSC2/CLKO — PORTA3 / Analog input 3 / crystal oscillator output / system clock output |
| Pin 6 | RA4/AN4 — PORTA4 / Analog input 4 |
| Pin 7 | RA5/AN5 — PORTA5 / Analog input 5 |
| Pin 8 | VSS — Ground reference |
| Pin 9 | OSC1/CLKI/RA2 — Alternate oscillator input (see pin 4 - tied in 28-SOIC variant; verify against datasheet) |
| Pin 10 | OSC2/CLKO/RA3 — Alternate oscillator output (see pin 5 - tied in 28-SOIC variant; verify against datasheet) |
| Pin 11 | RB0/AN8 — PORTB0 / Analog input 8 |
| Pin 12 | RB1/AN9 — PORTB1 / Analog input 9 |
| Pin 13 | RB2/AN10 — PORTB2 / Analog input 10 |
| Pin 14 | RB3/AN11 — PORTB3 / Analog input 11 |
| Pin 15 | RB4/AN12 — PORTB4 / Analog input 12 |
| Pin 16 | RB5/AN13 — PORTB5 / Analog input 13 |
| Pin 17 | RB6/AN14/PGEC1 — PORTB6 / Analog input 14 / ICSP clock |
| Pin 18 | RB7/AN15/PGED1 — PORTB7 / Analog input 15 / ICSP data |
| Pin 19 | VSS — Ground reference (digital) |
| Pin 20 | AVSS — Analog ground |
| Pin 21 | RC0 — PORTC0 |
| Pin 22 | RC1 — PORTC1 |
| Pin 23 | RC2 — PORTC2 |
| Pin 24 | RC3 — PORTC3 |
| Pin 25 | RC4 — PORTC4 |
| Pin 26 | RC5 — PORTC5 |
| Pin 27 | VDD — Digital supply voltage (2.0 V to 3.6 V) |
| Pin 28 | AVDD — Analog supply voltage (tie to VDD for most designs) |
Typical Applications
PIC24HJ128GP202-E/SO is suitable for 7 applications: BLDC and PMSM Motor Control, Digital Power Conversion (SMPS PFC and Phase-Shifted FB), Industrial Sensor Signal Conditioning and Data Loggers, UPS and Inverter Controllers, Automotive Body and Comfort ECUs, Embedded Graphics and HMI Front-Ends, Uninterruptible Power and Battery Management.
BLDC and PMSM Motor Control
The PIC24HJ128GP202-E/SO fits BLDC and PMSM motor control because its 40 MIPS core, 8-channel DMA, and 16-bit motor-control PWM block execute field-oriented control (FOC) loops within typical 10-20 kHz switching periods. The 21 I/O pins support three-phase gate drivers, Hall or quadrature encoder inputs, and current-sense amplifiers, while the integrated 10/12-bit ADC with 500 ksps digitizes phase currents simultaneously through DMA without CPU intervention. The extended -40C to +125C grade tolerates under-hood and industrial inverter thermal environments. Engineers pair this part with the dsPIC33F plug-in when DSP-style Clarke/Park transformations are preferred, since the pinout is shared. The 128 KB Flash holds a full FOC library plus sensorless startup routines, removing the need for an external memory.
Recommended
Digital Power Conversion (SMPS PFC and Phase-Shifted FB)
The PIC24HJ128GP202-E/SO is widely used in digital SMPS PFC and phase-shifted full-bridge power supplies because the 40 MIPS core runs voltage-mode and average-current-mode control loops with sub-microsecond update rates. Eight DMA channels offload ADC sampling of input voltage, input current, output voltage, and output current, leaving the CPU to compute PWM duty cycles for the converter. The 128 KB Flash accommodates PID compensators, soft-start ramps, and fault-recovery state machines. Two UART, two SPI, and one I2C connect to housekeeping peripherals, while the extended temperature grade supports industrial PSU enclosures. Reference designs from Microchip typically place the ADC trigger 100 ns ahead of the PWM edge to compensate for sampling delay.
Recommended
Industrial Sensor Signal Conditioning and Data Loggers
The PIC24HJ128GP202-E/SO suits industrial sensor signal conditioning and standalone data loggers because its 16-channel 10/12-bit ADC handles thermocouples, RTDs, and 4-20 mA loops through multiplexed front ends. The 8 KB SRAM buffers samples between DMA-driven SD-card writes, while the 128 KB Flash stores lookup tables for linearization and engineering-unit conversion. UART and SPI connect to RS-485 transceivers or external Flash for high-capacity logging. The extended temperature grade -40C to +125C ensures operation in outdoor cabinets and factory floors. Typical designs sample at 100 Hz to 1 kHz across channels, with the on-chip 8 MHz oscillator and PLL providing stable timing reference for the sampling clock.
Recommended
UPS and Inverter Controllers
The PIC24HJ128GP202-E/SO drives UPS and inverter controllers by combining 40 MIPS throughput with 8 DMA channels that manage parallel ADC sampling from battery voltage, bus current, and inverter output. The 16-bit PWM block generates 20 kHz SPWM waveforms with programmable dead-time insertion, while the extended temperature range supports battery compartments that can exceed 70C ambient. The 128 KB Flash holds sine-lookup tables, MPPT algorithms for solar inverters, and fault-recovery state machines. Two UART ports bridge RS-232/RS-485 service consoles or Modbus RTU links. Engineers often pair this MCU with external gate drivers since the PIC24H lacks high-current outputs.
Recommended
Automotive Body and Comfort ECUs
The PIC24HJ128GP202-E/SO fits automotive body and comfort ECUs including seat controllers, mirror modules, and lighting controllers because the extended -40C to +125C grade covers under-hood thermal excursions. The 21 I/O pins drive LED arrays, H-bridges, and LIN bus transceivers, and the two UART ports implement LIN 2.1 slave stacks. The 128 KB Flash stores PWM fading curves and diagnostic tables, while the 8 KB SRAM handles CAN/LIN message buffers. However, note that the part is not AEC-Q100 qualified - automotive safety-critical systems should use dsPIC33F AEC-Q100 variants instead. The 28-SOIC package simplifies assembly versus QFN alternatives, supporting fast prototyping in Tier-1 labs.
Recommended
Embedded Graphics and HMI Front-Ends
The PIC24HJ128GP202-E/SO acts as a graphics front-end for low-cost HMI panels where the 128 KB Flash stores bitmap fonts, menu structures, and touch calibration tables, while the 8 KB SRAM drives a partial-screen framebuffer. SPI peripherals connect to small TFT or OLED controllers such as SSD1351, and the DMA engine moves SPI pixel data without CPU load. Two UARTs bridge RS-232/RS-485 host links for shop-floor terminals. The 16-bit PWM block dims the display backlight with smooth fading curves, and the extended temperature grade supports outdoor kiosks. Designers should note that the part lacks an integrated display controller, so all pixel data is software-driven, limiting typical use to 128x64 monochrome or 160x128 color panels.
Recommended
Uninterruptible Power and Battery Management
The PIC24HJ128GP202-E/SO handles UPS and battery-management host logic by running state-of-charge algorithms, charger control loops, and cell-balancing decisions across 128 KB of Flash. DMA channels sample pack voltage, current, and individual cell voltages via external ADCs, freeing the core for SOC math. Two UART and one I2C link to BMS slaves or communication modules. The extended temperature grade lets the MCU sit inside sealed battery packs, while the 21 I/O pins drive MOSFET arrays, fan controllers, and alarm indicators. The 8 KB SRAM is sufficient for SOC tables and short event capture, with the on-chip 8 MHz oscillator and PLL providing system timing.
Recommended
Recommended Products Summary
Engineering reference data for PIC24HJ128GP202-E/SO — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC24HJ128GP202-I/SO | PIC24HJ64GP202-E/SO | dsPIC33FJ128GP202-E/SO | dsPIC33FJ64GP202-E/SO |
|---|---|---|---|---|---|
| Package | 28-SOIC | 28-SOIC - same | 28-SOIC - same | 28-SOIC - same | 28-SOIC - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Core Architecture | PIC24H 16-bit | PIC24H 16-bit - same | PIC24H 16-bit - same | dsPIC33F 16-bit DSP - upgrade | dsPIC33F 16-bit DSP - upgrade |
| Maximum Speed (MIPS) | 40 MIPS | 40 MIPS - same | 40 MIPS - same | 40 MIPS - same | 40 MIPS - same |
| Flash Memory | 128 KB | 128 KB - same | 64 KB (-50%) | 128 KB - same | 64 KB (-50%) |
| SRAM | 8 KB | 8 KB - same | 8 KB - same | 8 KB - same | 8 KB - same |
| Temperature Grade | Extended -40C to +125C ("-E") | Industrial -40C to +85C ("-I") - narrower | Extended -40C to +125C - same | Extended -40C to +125C - same | Extended -40C to +125C - same |
| DSP Engine | No (PIC24H controller) | No - same | No - same | Yes (MAC + 40-bit accumulators) - upgrade | Yes (MAC + 40-bit accumulators) - upgrade |
| DMA Channels | 8 | 8 - same | 8 - same | 8 - same | 8 - same |
| AEC-Q100 Qualified | No (industrial extended grade) | No - same | No - same | No (select Q1 variants are AEC-Q100) | No (select Q1 variants are AEC-Q100) |
Key Differentiators
- Extended -40C to +125C temperature grade (vs PIC24HJ128GP202-I/SO)
- Doubled Flash vs lower-memory sibling (vs PIC24HJ64GP202-E/SO)
- DSP-free controller core at lower cost than dsPIC (vs dsPIC33FJ128GP202-E/SO)
Design Notes
Estimated: at 40 MIPS, VDD = 3.3 V, the PIC24HJ128GP202-E/SO core typically draws 50-70 mA during active execution and 30-50 uA in sleep. Place a 100 nF decoupling capacitor as close as possible to each VDD/AVDD pin pair (pins 27-28 and 19-20), and add a bulk 4.7 uF tantalum or ceramic on the supply rail. The analog and digital ground planes should be tied at a single star point near the MCU's AVSS/AVDD pins to minimize ADC reference noise.
Route the analog ADC inputs with guard traces and a contiguous analog ground plane; Microchip application note TB3138 recommends 0.5 mm minimum trace width and 8 mil isolation between analog and digital traces. Place the MCLR pull-up (typically 10 kohm) close to the MCU and add a 100 nF to MCLR for production environments with noisy power rails. The ICSP pins (PGEC1/PGED1) share RB6/RB7 and must be routed without interference to the debugger header.
Estimated: at ambient 85C in a sealed enclosure, the PIC24HJ128GP202-E/SO silicon may approach 105C junction based on roughly 50 mA active core current at 3.3 V and theta_JA near 70 C/W for the SOIC-28 package. Provide copper pours on all ground-connected pins and consider small PCB heatsink areas around the SOIC footprint. For designs that run continuous loops at 40 MIPS with many peripherals active, validate junction temperature against the application-specific thermal envelope, not just the -40C to +125C operating range.
Do not forget to configure the oscillator source and PLL after startup; firmware that omits the OSCCON and CLKDIVRE.PLLPRE settings will not reach the 40 MIPS ceiling. Watch for buffer overflow when DMA moves data faster than the CPU drains buffers - the 8 KB SRAM can saturate under high-rate ADC pipelines. The -E suffix specifies extended -40C to +125C industrial grade, but the part is NOT AEC-Q100 qualified - for automotive safety-critical designs, choose the AEC-Q100 Q1 variants instead.
Compliance Information
RoHS compliant per Microchip product page. Not AEC-Q100 qualified - select Q1-suffixed variants for automotive safety-critical applications. The -E suffix indicates the extended -40C to +125C industrial grade, not automotive qualification.
