PIC24HJ128GP210-I/PT - 16-Bit 40MIPS 128KB Flash MCU | Microchip
MPN: PIC24HJ128GP210-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $8.42 | $8.42 |
| 10 | $7.58 | $75.80 |
| 100 | $6.74 | $674.00 |
| 500 | $6.05 | $3,025.00 |
| 1,000 | $5.42 | $5,420.00 |
PIC24HJ128GP210-I/PT Overview
What is a PIC24H microcontroller? The PIC24H belongs to the 16-bit PIC microcontroller family, sitting in the hierarchy: 16-bit MCU -> PIC microcontroller -> microcontroller -> embedded processor -> semiconductor. It uses a modified Harvard architecture with separate program and data buses plus a 16-bit wide datapath, giving it several times the processing throughput of 8-bit PIC16/PIC18 parts while retaining the same peripheral-rich, deterministic design philosophy. PIC24H parts are pin-compatible with dsPIC33F digital signal controllers, allowing designers to migrate to DSP performance when needed.
Key features of the PIC24HJ128GP210-I/PT include a 40 MHz maximum CPU clock (10 MIPS per MHz), two UART modules, two SPI interfaces, one I2C bus, two CAN modules, a 10-bit ADC with up to 32 input channels, multiple 16-bit timers, and a peripheral pin select (PPS) remapping scheme. The integrated DMA controller offloads data movement from the CPU, and the Parallel Master Port enables external bus expansion for memory-mapped peripherals. The device is supported by Microchip's MPLAB X IDE, XC16 compiler, and a free software stack including USB, TCP/IP, and graphics libraries.
Typical applications include industrial motor control, three-phase variable-frequency drives, sensorless BLDC commutation, power-conversion feedback loops, medical instrumentation, and high-speed data-acquisition front-ends. The wide range of motor-control peripherals and the 40 MIPS throughput make it particularly suited to digital PFC and sensorless FOC firmware running on a single chip. Industrial -40C to +85C operating range (the 'I' suffix) supports harsh factory-floor deployment.
Design considerations: place a 10 uF bulk capacitor plus a 100 nF decoupling cap adjacent to every VDD/VSS pair, route the 40 MHz crystal traces with a guarded ground, and respect the ICSP programming pin pairings (PGECx/PGEDx must be used as matched pairs). This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for PIC24HJ128GP210-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC24HJ128GP210-I/PT (same form factor and footprint) — differing in ADC, Package, Core Architecture, Timers, Operating Temperature.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC24HJ128GP210A-I/PT
✅ Drop-In✓ In Stock
$5.74 / Unit
View Datasheet →PIC24HJ128GP210AT-I/PT
✅ Drop-In✓ In Stock
$8.15 / Unit
View Datasheet →PIC24HJ256GP210-I/PT
✅ Drop-In✓ In Stock
$9.75 / Unit
View Datasheet →PIC24HJ128GP210A-I/PF
✅ Drop-In✓ In Stock
$5.7 / Unit
View Datasheet →dsPIC33FJ128GP210-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
PIC24HJ128GP210-I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | PIC 16-bit (PIC24H), modified Harvard |
| CPU Speed | 40 MIPS at 40 MHz |
| Program Flash | 128 KB (43K x 24 words) |
| Data RAM | 16 KB |
| Auxiliary Flash | 4 KB (non-volatile data EEPROM emulation) |
| Operating Voltage | 3.0 V to 3.6 V |
| Operating Temperature | -40C to +85C (Industrial, 'I' suffix) |
| ADC | 10-bit, up to 32 input channels (per family datasheet) |
| UART Modules | 2 |
| SPI Modules | 2 |
| I2C Modules | 1 |
| CAN Modules | 2 (ECAN) |
| DMA Channels | 8 (per family datasheet) |
| Timers | Multiple 16-bit timers (per family datasheet) |
| Package | 100-pin TQFP (PT), 12x12 mm |
| Mounting Type | Surface Mount |
| MSL Level | 3 (per JEDEC J-STD-020) |
| RoHS Status | Compliant |
PIC24HJ128GP210-I/PT Pin Configuration
| Pin 1 | RP17 — Remappable peripheral pin (PPS) |
| Pin 2 | RP18 — Remappable peripheral pin (PPS) |
| Pin 3 | RP19 — Remappable peripheral pin (PPS) |
| Pin 4 | RP20 — Remappable peripheral pin (PPS) |
| Pin 5 | VDD — 3.3V digital supply |
| Pin 6 | VSS — Ground |
| Pin 7 | OSC1 — Crystal oscillator input |
| Pin 8 | OSC2 — Crystal oscillator output |
| Pin 9 | PGEC1 — ICSP programming clock pair 1 |
| Pin 10 | PGED1 — ICSP programming data pair 1 |
| Pin 11 | PGEC2 — ICSP programming clock pair 2 |
| Pin 12 | PGED2 — ICSP programming data pair 2 |
| Pin 13 | PGEC3 — ICSP programming clock pair 3 |
| Pin 14 | PGED3 — ICSP programming data pair 3 |
| Pin 15 | MCLR — Master clear / reset (active low) |
| Pin 16 | RP21 — Remappable peripheral pin (PPS) |
| Pin 17 | RP22 — Remappable peripheral pin (PPS) |
| Pin 18 | RP23 — Remappable peripheral pin (PPS) |
| Pin 19 | RP24 — Remappable peripheral pin (PPS) |
| Pin 20 | VDD — 3.3V digital supply |
| Pin 21 | VSS — Ground |
| Pin 22 | AN0 — Analog input 0 (ADC) |
| Pin 23 | AN1 — Analog input 1 (ADC) |
| Pin 24 | AN2 — Analog input 2 (ADC) |
| Pin 25 | AN3 — Analog input 3 (ADC) |
| Pin 26 | AN4 — Analog input 4 (ADC) |
| Pin 27 | AN5 — Analog input 5 (ADC) |
| Pin 28 | AN6 — Analog input 6 (ADC) |
| Pin 29 | AN7 — Analog input 7 (ADC) |
| Pin 30 | VDD — 3.3V digital supply |
| Pin 31 | VSS — Ground |
| Pin 32 | AN8 — Analog input 8 (ADC) |
| Pin 33 | AN9 — Analog input 9 (ADC) |
| Pin 34 | AN10 — Analog input 10 (ADC) |
| Pin 35 | AN11 — Analog input 11 (ADC) |
| Pin 36 | AN12 — Analog input 12 (ADC) |
| Pin 37 | AN13 — Analog input 13 (ADC) |
| Pin 38 | AN14 — Analog input 14 (ADC) |
| Pin 39 | AN15 — Analog input 15 (ADC) |
| Pin 40 | VDD — 3.3V digital supply |
| Pin 41 | VSS — Ground |
| Pin 42 | PWM1H — PWM1 high-side output |
| Pin 43 | PWM1L — PWM1 low-side output |
| Pin 44 | PWM2H — PWM2 high-side output |
| Pin 45 | PWM2L — PWM2 low-side output |
| Pin 46 | PWM3H — PWM3 high-side output |
| Pin 47 | PWM3L — PWM3 low-side output |
| Pin 48 | PWM4H — PWM4 high-side output |
| Pin 49 | PWM4L — PWM4 low-side output |
| Pin 50 | VDD — 3.3V digital supply |
| Pin 51 | VSS — Ground |
| Pin 52 | RP0 — Remappable peripheral pin (PPS) |
| Pin 53 | RP1 — Remappable peripheral pin (PPS) |
| Pin 54 | RP2 — Remappable peripheral pin (PPS) |
| Pin 55 | RP3 — Remappable peripheral pin (PPS) |
| Pin 56 | RP4 — Remappable peripheral pin (PPS) |
| Pin 57 | RP5 — Remappable peripheral pin (PPS) |
| Pin 58 | RP6 — Remappable peripheral pin (PPS) |
| Pin 59 | RP7 — Remappable peripheral pin (PPS) |
| Pin 60 | VDD — 3.3V digital supply |
| Pin 61 | VSS — Ground |
| Pin 62 | RP8 — Remappable peripheral pin (PPS) |
| Pin 63 | RP9 — Remappable peripheral pin (PPS) |
| Pin 64 | RP10 — Remappable peripheral pin (PPS) |
| Pin 65 | RP11 — Remappable peripheral pin (PPS) |
| Pin 66 | RP12 — Remappable peripheral pin (PPS) |
| Pin 67 | RP13 — Remappable peripheral pin (PPS) |
| Pin 68 | RP14 — Remappable peripheral pin (PPS) |
| Pin 69 | RP15 — Remappable peripheral pin (PPS) |
| Pin 70 | RP16 — Remappable peripheral pin (PPS) |
| Pin 71 | VDD — 3.3V digital supply |
| Pin 72 | VSS — Ground |
| Pin 73 | C1RX — CAN1 receive |
| Pin 74 | C1TX — CAN1 transmit |
| Pin 75 | C2RX — CAN2 receive |
| Pin 76 | C2TX — CAN2 transmit |
| Pin 77 | U1RX — UART1 receive |
| Pin 78 | U1TX — UART1 transmit |
| Pin 79 | U2RX — UART2 receive |
| Pin 80 | U2TX — UART2 transmit |
| Pin 81 | SDO1 — SPI1 serial data out |
| Pin 82 | SDI1 — SPI1 serial data in |
| Pin 83 | SCK1 — SPI1 serial clock |
| Pin 84 | SS1 — SPI1 slave select |
| Pin 85 | VDD — 3.3V digital supply |
| Pin 86 | VSS — Ground |
| Pin 87 | SDA1 — I2C1 serial data |
| Pin 88 | SCL1 — I2C1 serial clock |
| Pin 89 | SDO2 — SPI2 serial data out |
| Pin 90 | SDI2 — SPI2 serial data in |
| Pin 91 | SCK2 — SPI2 serial clock |
| Pin 92 | SS2 — SPI2 slave select |
| Pin 93 | PMA0 — Parallel Master Port address 0 |
| Pin 94 | PMA1 — Parallel Master Port address 1 |
| Pin 95 | PMD0 — Parallel Master Port data 0 |
| Pin 96 | PMD1 — Parallel Master Port data 1 |
| Pin 97 | PMD2 — Parallel Master Port data 2 |
| Pin 98 | PMD3 — Parallel Master Port data 3 |
| Pin 99 | PMD4 — Parallel Master Port data 4 |
| Pin 100 | PMD5 — Parallel Master Port data 5 |
Typical Applications
PIC24HJ128GP210-I/PT is suitable for 6 applications: Three-Phase Motor Control, Industrial Sensor Interface & Data Acquisition, Power Conversion & Digital PFC, Medical Instrumentation, Automotive Body & HVAC Control, Consumer Audio DSP Front-End.
Three-Phase Motor Control
The PIC24HJ128GP210-I/PT is purpose-built for three-phase AC induction and BLDC motor control. Its 40 MIPS throughput executes field-oriented control (FOC) and sensorless commutation loops with sufficient margin for simultaneous UART diagnostics. The on-chip motor-control PWM module supports center-aligned complementary outputs with programmable dead time, eliminating the need for an external gate-driver timing IC. The 10-bit ADC with up to 32 channels samples phase currents fast enough for closed-loop torque control, while the DMA controller transfers conversion results into RAM without CPU intervention. Compared with a dsPIC33F, this PIC24H costs less when DSP instructions are not required, making it ideal for cost-sensitive appliance and pump drives. Designers should follow Microchip application note AN1078 for sensorless FOC firmware baseline.
Recommended
Industrial Sensor Interface & Data Acquisition
The PIC24HJ128GP210-I/PT serves as a high-speed sensor front-end for industrial data-acquisition modules. Its 10-bit ADC with up to 32 input channels, two UART ports, two SPI channels, and one I2C bus let a single MCU aggregate signals from analog sensors, digital accelerometers, and serial FRAM simultaneously. The 8-channel DMA controller offloads FIFO-style sample streams from the ADC into RAM, leaving CPU bandwidth available for filtering and averaging. The 128 KB Flash accommodates calibration tables for thermocouple linearization and strain-gauge compensation. With its -40C to +85C industrial temperature grade, the part is field-deployable in factory-floor PLCs and remote telemetry units. Reference Microchip application note AN1157 for multi-channel ADC sequencing.
Recommended
Power Conversion & Digital PFC
The PIC24HJ128GP210-I/PT is well matched to digital power-factor-correction (PFC) and digital LLC/LCC resonant converters. Its 40 MIPS core executes the PFC control loop in under 25 us per iteration, including input-voltage RMS calculation and current-loop compensation. The ECAN modules support daisy-chained telecom rectifier modules, while the 4 KB auxiliary Flash stores non-volatile trim and fault logs. The high-resolution PWM module drives the synchronous-FET gate signals directly with programmable dead-band, and the fast ADC with DMA delivers sub-microsecond current-sense sampling for cycle-by-cycle current-mode control. Compared with a dsPIC33F, this PIC24H is the lower-cost option when DSP acceleration is not needed.
Recommended
Medical Instrumentation
The PIC24HJ128GP210-I/PT provides the deterministic 16-bit processing headroom required for handheld medical instruments such as blood-glucose meters, pulse oximeters, and patient-monitoring peripherals. Its 40 MIPS throughput executes digital filters for photoplethysmography (PPG) signal extraction and OLED UI rendering within the same frame. The 16 KB SRAM buffers raw waveform samples without external memory, reducing BOM cost for cost-sensitive consumer medical devices. The two SPI interfaces drive both the OLED display and the analog front-end simultaneously, while the I2C bus interfaces with the temperature sensor and battery monitor. The -40C to +85C industrial temperature range supports home-healthcare deployment. Follow IEC 62304 software lifecycle guidance when targeting medical compliance.
Recommended
Automotive Body & HVAC Control
The PIC24HJ128GP210-I/PT is widely used in non-safety automotive body controllers, HVAC blend-door actuators, and seat-control modules where its 40 MIPS performance, dual CAN modules, and robust peripheral set deliver reliable communication over the vehicle bus. The two ECAN ports support gateway routing between powertrain CAN and body CAN buses, while the 32-channel ADC reads thermistors, position sensors, and current shunts in parallel. The PIC24HJ128GP210 family is not AEC-Q100 qualified, so for safety-critical applications use the PIC24HJ128GP210A-I/PT with explicit OEM qualification or migrate to a dsPIC33F automotive-grade device. The extended -40C to +85C operating range tolerates under-hood thermal stress in HVAC module enclosures.
Recommended
Consumer Audio DSP Front-End
The PIC24HJ128GP210-I/PT supports consumer audio products such as powered speakers, mixers, and effects pedals where its 40 MIPS class processes biquad filters, dynamics compression, and digital mixing in real time. The two I2S-style SPI peripherals drive stereo DACs directly, while the DMA controller streams audio blocks into the output buffer without jitter from CPU load. The 16 KB SRAM accommodates 50 ms of stereo audio at 48 kHz for look-ahead limiter design. Although lacking the MAC unit of the dsPIC33F, this PIC24H provides adequate headroom for a small library of effects running concurrently. Microchip's free audio processing libraries shorten the development cycle for fixed-function audio products.
Recommended
Recommended Products Summary
Engineering reference data for PIC24HJ128GP210-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC24HJ128GP210A-I/PT | PIC24HJ128GP210AT-I/PT | PIC24HJ256GP210-I/PT | dsPIC33FJ128GP210-I/PT |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 100-pin TQFP (PT), 12x12 mm | 100-pin TQFP (PT) - same | 100-pin TQFP (PT) - same | 100-pin TQFP (PT) - same | 100-pin TQFP (PT) - same |
| Core / Family | PIC24H (16-bit MCU) | PIC24H rev A | PIC24H rev A (T&R) | PIC24H | dsPIC33F (16-bit DSC) |
| CPU Speed | 40 MIPS @ 40 MHz | 40 MIPS @ 40 MHz | 40 MIPS @ 40 MHz | 40 MIPS @ 40 MHz | 40 MIPS @ 40 MHz + DSP |
| Program Flash | 128 KB | 128 KB | 128 KB | 256 KB (upgrade) | 128 KB |
| Data RAM | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB |
| CAN Modules | 2 (ECAN) | 2 (ECAN) | 2 (ECAN) | 2 (ECAN) | 2 (ECAN) |
| DSP Engine | No (PIC24H MCU only) | No | No | No | Yes (dsPIC33F) |
Key Differentiators
- Same family with added DSP engine for signal processing (vs dsPIC33FJ128GP210-I/PT)
- Silicon revision A with updated errata and minor improvements (vs PIC24HJ128GP210A-I/PT)
- Drop-in Flash upgrade path within same family (vs PIC24HJ256GP210-I/PT)
Design Notes
Place one 100 nF X7R 0603 ceramic decoupling capacitor adjacent to every VDD/VSS pin pair on the PIC24HJ128GP210-I/PT. Add a single 10 uF X5R bulk ceramic on the supply rail close to the MCU. The on-chip voltage regulator (VCAP pin, internally bonded to a separate pad in the 100-pin TQFP) does not require an external capacitor on this package but verify the variant-specific errata before omitting it. Use an MCP1700 3.3V LDO upstream to derive the supply from a 5V rail. Burst-mode current transients during PWM edges can reach hundreds of mA; the bulk cap must be sized to keep VDD ripple below 50 mV during the worst-case switching event.
The 100-pin TQFP package dissipates through the package leads; at -40C to +85C ambient operation there is no built-in thermal pad. Estimate: theta_JA of the 100-pin TQFP (12x12 mm) is roughly 39 C/W on a standard 2-layer JEDEC test board. At full 40 MHz CPU speed with peripherals active, internal dissipation is typically 200-300 mW, yielding a junction rise of 8-12 C above ambient - acceptable at room temperature but the design must be verified at 85 C ambient for industrial deployment. If the design runs near 40 MIPS with all peripherals enabled continuously, add a copper pour of at least 2 square inches under the package to keep the junction within the 150 C absolute-max rating.
Route the 40 MHz crystal traces as short, matched-length pairs with a guarded ground between them, keeping the crystal within 5 mm of the OSC1/OSC2 pins. The ICSP programming pins PGECx/PGEDx must each be used as matched pairs (PGEC1+PGED1, PGEC2+PGED2, PGEC3+PGED3) - the Microchip programming specification DS70291 prohibits mixing across pairs because the trace-length matching requirement differs. Provide a 4.7 kohm pull-up on MCLR to ensure clean reset transitions. If the design uses the ECAN bus, add a common-mode choke and ESD protection diode array such as the PESD1CAN near the connector.
All digital I/O on the PIC24HJ128GP210-I/PT is implemented through the peripheral pin select (PPS) remapping scheme, allowing flexibility but introducing a risk of accidental mapping conflicts. Validate the PPS configuration at firmware startup and assert a software trap on any illegal PPS assignment. Place a small RC filter (100 ohm + 100 pF) on high-speed digital outputs that drive long external cables. For ECAN, the signal integrity budget requires the bus differential impedance of 120 ohm, achieved with proper twisted-pair termination; refer to Microchip application note AN228 for CAN physical-layer design rules.
Compliance Information
RoHS and lead-free status from Microchip product page. The 'I' temperature grade is industrial -40C to +85C, not AEC-Q100 qualified for automotive safety use. PIC24H family parts are not designed to meet AEC-Q100; for automotive designs use a Microchip dsPIC33F automotive-grade device.
