PIC32MX130F256B-50I/ML - 32-bit 50MHz MCU, 256KB Flash | Microchip
MPN: PIC32MX130F256B-50I/ML ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $4.3 | $4.30 |
| 10 | $3.85 | $38.50 |
| 100 | $3.42 | $342.00 |
| 500 | $2.98 | $1,490.00 |
| 1,000 | $2.65 | $2,650.00 |
PIC32MX130F256B-50I/ML Overview
A microcontroller (MCU) is a single-chip computer that integrates a CPU core, program memory (Flash), working memory (RAM), and a rich set of peripherals such as timers, ADCs, communication interfaces, and I/O pins. Within the semiconductor taxonomy, the PIC32MX130F256B-50I/ML sits at: microcontroller -> 32-bit MCU -> MIPS M4K architecture MCU -> PIC32MX family -> PIC32MX1xx sub-family. This positioning places it above 8-bit PIC16/PIC18 MCUs in performance and below the higher-pin-count PIC32MX3xx/4xx/5xx/6xx/7xx families in peripheral count.
Key features include two I2S/SPI modules for codec and serial communication, Peripheral Pin Select (PPS) for flexible signal routing, a Parallel Master Port (PMP) for graphics and external memory interfaces, mTouch capacitive touch support, 1 ns high-resolution time measurement, an on-chip temperature sensor, and a 10-bit ADC. The 28-QFN package includes an exposed pad that lowers thermal resistance to roughly 30 C/W when properly soldered, supporting sustained 50 MHz operation across the -40C to +85C industrial range.
The PIC32MX130F256B-50I/ML uses Microchip's MIPS32 M4K Harvard bus architecture with separate Flash and SRAM buses for instruction and data, enabling single-cycle Flash accesses at 50 MHz. The 2.5V/3.3V operation (2.3V-3.6V tolerant) makes the part directly compatible with 3.3V logic systems commonly used in audio, industrial sensing, and consumer HMI applications.
Typical applications include capacitive touch key panels, low-cost graphical HMI with PMP-driven LCDs, audio playback using I2S codecs, USB device-class human-interface devices (HID), industrial sensor hubs with 10-bit ADC, and portable instrumentation that leverages the 1 ns timer resolution. Designers targeting lower-power designs can run the core at scaled frequencies via the on-chip PLL and oscillator switching.
When designing with this MCU, allocate sufficient decoupling capacitance (100 nF plus 4.7 uF bulk) close to the VDDCORE pins and ensure the exposed pad is soldered to a continuous ground plane for thermal dissipation. The 50 MHz maximum frequency requires the crystal or external clock to remain within +-50 ppm tolerance for UART and USB timing accuracy.
This page synthesizes distributor pricing, drop-in alternatives, and design notes that extend beyond the manufacturer datasheet to help engineers shorten design-in cycles and validate second-source options.
Drop-in alternatives for PIC32MX130F256B-50I/ML — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC32MX130F256B-50I/ML (same form factor and footprint) — differing in ADC, Package, USB, Operating Temperature, Operating Voltage.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC32MX130F256B-I/ML
✅ Drop-In✓ In Stock
$4.12 / Unit
View Datasheet →PIC32MX130F256BT-50I/ML
✅ Drop-In📋 Reference alternative (not in catalog)
PIC32MX150F256B-50I/ML
✅ Drop-In📋 Reference alternative (not in catalog)
PIC32MX170F256B-50I/ML
✅ Drop-In✓ In Stock
$3.46 / Unit
View Datasheet →PIC32MX250F256B-50I/ML
✅ Drop-In📋 Reference alternative (not in catalog)
PIC32MX130F256B-50I/ML Maximum Ratings & Electrical Characteristics
| Core Architecture | MIPS32 M4K |
| Core Bit Width | 32-bit |
| Maximum CPU Clock | 50 MHz |
| DMIPS Performance | 83 DMIPS |
| Program Memory (Flash) | 256 KB (256K x 8) |
| Data Memory (SRAM) | 16 KB |
| Operating Voltage | 2.3 V to 3.6 V (2.5 V / 3.3 V typical) |
| Active Current Consumption | 0.5 mA/MHz (typical) |
| ADC | 10-bit |
| I2S / SPI Modules | 2 |
| Peripheral Pin Select (PPS) | Yes |
| Parallel Master Port (PMP) | Yes |
| mTouch Capacitive Touch | Yes |
| High-Resolution Timer | 1 ns |
| On-chip Temperature Sensor | Yes |
| Package | 28-pin QFN (6x6 mm) with exposed pad |
| Mounting Type | Surface Mount |
| Operating Temperature | -40C to +85C (Industrial) |
| MSL Level | 1 |
| RoHS Status | Compliant |
| Lead Free | Yes |
PIC32MX130F256B-50I/ML Pin Configuration
| Pin 1 | PGEC3/AN0/RPB0/CTED1/RB0 — Programming clock / Analog input / I/O port B bit 0 |
| Pin 2 | PGED3/AN1/RPB1/CTED2/RB1 — Programming data / Analog input / I/O port B bit 1 |
| Pin 3 | AN2/RPB2/SDA2/CN4/RB2 — Analog input / I2C2 SDA / I/O port B bit 2 |
| Pin 4 | AN3/RPB3/SCL2/CN5/RB3 — Analog input / I2C2 SCL / I/O port B bit 3 |
| Pin 5 | AN4/RPB4/RB4 — Analog input / I/O port B bit 4 |
| Pin 6 | AN5/RPB5/RB5 — Analog input / I/O port B bit 5 |
| Pin 7 | VSS — Ground reference |
| Pin 8 | OSC1/CLKI/RA3 — Crystal oscillator input / External clock / I/O port A bit 3 |
| Pin 9 | OSC2/CLKO/RA2 — Crystal oscillator output / Clock output / I/O port A bit 2 |
| Pin 10 | VSS — Ground reference |
| Pin 11 | VDD — I/O supply voltage (2.3-3.6 V) |
| Pin 12 | PGEC1/AN6/RPB6/RB6 — Programming clock / Analog input / I/O port B bit 6 |
| Pin 13 | PGED1/AN7/RPB7/RB7 — Programming data / Analog input / I/O port B bit 7 |
| Pin 14 | AN8/RPB8/RB8 — Analog input / I/O port B bit 8 |
| Pin 15 | AN9/RPB9/RB9 — Analog input / I/O port B bit 9 |
| Pin 16 | TMS/CVREF-/AN10/RPB10/RB10 — JTAG TMS / Comparator ref / Analog input / I/O port B bit 10 |
| Pin 17 | TCK/CVREF+/AN11/RPB11/RB11 — JTAG TCK / Comparator ref / Analog input / I/O port B bit 11 |
| Pin 18 | TDO/AN12/RPB12/RB12 — JTAG TDO / Analog input / I/O port B bit 12 |
| Pin 19 | TDI/AN13/RPB13/RB13 — JTAG TDI / Analog input / I/O port B bit 13 |
| Pin 20 | VSS — Ground reference |
| Pin 21 | VDD — I/O supply voltage (2.3-3.6 V) |
| Pin 22 | AN14/RPB14/RB14 — Analog input / I/O port B bit 14 |
| Pin 23 | AN15/RPB15/OCFB/RB15 — Analog input / Output compare fault B / I/O port B bit 15 |
| Pin 24 | SDA1/RPA0/RA0 — I2C1 SDA / I/O port A bit 0 |
| Pin 25 | SCL1/RPA1/RA1 — I2C1 SCL / I/O port A bit 1 |
| Pin 26 | PGEC2/RPA2/RA2 — Programming clock / I/O port A bit 2 |
| Pin 27 | PGED2/RPA3/RA3 — Programming data / I/O port A bit 3 |
| Pin 28 | VSS — Ground reference |
Typical Applications
PIC32MX130F256B-50I/ML is suitable for 6 applications: Capacitive Touch Key Panels, Audio Playback with I2S Codec, Graphical HMI with PMP-driven LCD, Industrial Sensor Hub, USB HID Device Controller, Portable Instrumentation.
Capacitive Touch Key Panels
The PIC32MX130F256B-50I/ML is a strong fit for capacitive touch panels because it integrates the Microchip mTouch capacitive touch library support and a 1 ns high-resolution timer for accurate charge-time measurement. Its 50 MHz MIPS M4K core runs the touch scan loop plus the host communication stack (typically UART to a main controller) with comfortable headroom. The exposed-pad 28-QFN simplifies the ground reference underneath touch electrodes for stable readings. As an example, an 8-button kitchen-appliance panel plus a UART status stream runs comfortably below 20% CPU at 50 MHz, leaving cycles for button debouncing and LED feedback.
Recommended
Audio Playback with I2S Codec
The PIC32MX130F256B-50I/ML drives an external I2S DAC such as the Microchip MCP4725 or TI TLV320AIC23B comfortably with its two I2S/SPI modules. With DMA channels offloading sample movement, the 50 MHz core can run a custom audio player (e.g., WAV from SPI Flash plus I2S output) while leaving cycles for UI updates. The 16 KB SRAM is adequate for double-buffering 44.1 kHz 16-bit stereo with ~10 ms latency. PPS lets the designer route I2S data to any spare I/O, simplifying PCB layout when other peripherals share the same pins.
Recommended
Graphical HMI with PMP-driven LCD
The PIC32MX130F256B-50I/ML is well-suited to drive small graphical LCDs (e.g., 128x64 monochrome, 2.2-inch TFT) through its on-chip Parallel Master Port (PMP). The PMP engine supports 8-bit Intel 8080-style data transfers in continuous mode, offloading framebuffer writes from the CPU. The 50 MHz core can refresh a small monochrome display with a simple UI loop while running touch scanning via mTouch in parallel. Designers often pair this with external SPI Flash to hold font tables and image assets, accessed via one of the two SPI modules.
Recommended
Industrial Sensor Hub
The PIC32MX130F256B-50I/ML aggregates analog sensor data via its 10-bit ADC (1 Msps) and forwards the results over UART, SPI, or I2C to a master controller. The 50 MHz/83 DMIPS compute envelope handles 4-8 kHz sensor scan rates with local filtering (e.g., moving average, FIR) before forwarding. The -40C to +85C industrial temperature range covers factory-floor enclosures without derating. The exposed-pad QFN ground plane also serves as a quiet analog ground reference for the ADC, helping achieve the datasheet's 10-bit ENOB.
Recommended
USB HID Device Controller
Although the PIC32MX130F256B-50I/ML lacks an internal USB controller, designers commonly pair it with an external Microchip PIC32MX150F256B (with USB) or a USB-UART bridge IC like the MCP2200. For simpler HID-only roles the 50 MHz core can bit-bang low-speed USB with the 1 ns timer used for NRZI encoding, though this is uncommon. The PPS feature allows flexible pin assignment for the USB sense and suspend lines. Realistically, designers needing USB choose the PIC32MX150/250/270 sub-family in the same 28-QFN for a clean drop-in path.
Recommended
Portable Instrumentation
The PIC32MX130F256B-50I/ML suits handheld measurement tools such as multimeters and oscilloscope probes thanks to its low 0.5 mA/MHz active current and microamp-range sleep modes. The on-chip temperature sensor plus 10-bit ADC lets the device self-monitor battery or thermal drift, while the 1 ns high-resolution timer supports precise frequency and pulse-width measurements. The exposed-pad 28-QFN keeps the footprint under 36 mm^2, leaving board area for the analog front end and a small TFT. Low-power run mode draws roughly 12 mA at 24 MHz, extending battery life in portable tools.
Recommended
Recommended Products Summary
Engineering reference data for PIC32MX130F256B-50I/ML — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC32MX130F256B-I/ML | PIC32MX130F256BT-50I/ML | PIC32MX150F256B-50I/ML | PIC32MX170F256B-50I/ML | PIC32MX250F256B-50I/ML |
|---|---|---|---|---|---|---|
| Package | 28-pin QFN (6x6) with exposed pad | 28-pin QFN (6x6) - same | 28-pin QFN (6x6) - same | 28-pin QFN (6x6) - same | 28-pin QFN (6x6) - same | 28-pin QFN (6x6) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Maximum CPU Clock | 50 MHz | 40 MHz | 50 MHz | 50 MHz | 50 MHz | 50 MHz |
| Flash | 256 KB | 256 KB | 256 KB | 256 KB | 256 KB | 256 KB |
| SRAM | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB | 64 KB |
| ADC Resolution | 10-bit | 10-bit | 10-bit | 10-bit | 12-bit | 10-bit |
| USB 2.0 | No | No | No | Yes (Full-Speed OTG) | Yes (Full-Speed OTG) | Yes (Full-Speed OTG) |
| Crypto Engine | No | No | No | No | Yes | No |
| DAC | No | No | No | No | No | 8-bit DAC |
Key Differentiators
- Highest speed grade at 50 MHz in the 28-QFN 256K Flash variant (vs PIC32MX130F256B-I/ML)
- Integrated mTouch and 1 ns timer for capacitive touch applications (vs PIC32MX170F256B-50I/ML)
- Smallest 28-QFN footprint in the PIC32MX1xx family with full peripheral set (vs PIC32MX150F256B-50I/ML)
Design Notes
Place a 100 nF ceramic decoupling capacitor on each VDD/VDDCORE pin pair, located within 3 mm of the pin, plus a single 4.7 uF bulk capacitor near the chip. For USB or noise-sensitive analog applications, add a ferrite bead between the digital and analog supply domains if separated. Brown-out reset voltage must be configured above the minimum operating voltage (2.3 V) to avoid spurious resets during battery droop.
The exposed thermal pad (EP) under the 28-QFN must be soldered directly to a continuous copper ground plane to achieve the datasheet's thermal resistance figure of approximately 30 C/W. Without the EP soldered, junction temperature can exceed the 125C maximum at 50 MHz with peripheral activity. Provide 8-12 thermal vias in the EP land to conduct heat to internal ground layers in a four-layer PCB stack-up.
Keep the 50 MHz oscillator traces short (under 10 mm) and surround them with a continuous ground guard trace tied to ground at both ends. For 28-QFN PCB layout, allocate at least 6 mm clearance around the EP vias for clean ground-return paths. PPS (Peripheral Pin Select) gives flexibility to assign digital peripherals to non-adjacent pins, which helps when routing high-speed signals away from analog traces.
Do not skip the ICSP programming header - the PIC32MX130F256B-50I/ML requires PGECx/PGEDx pins for in-circuit programming and debugging. Misconfiguring the Configuration bits in code (DEVCFG0/1/2/3) can lock the part from debug access, so always set the appropriate DEBUG configuration bit to keep ICSP active. The 50 MHz operation requires the PLL to be enabled and the system clock divider to be set correctly in the OSCCON register - firmware that fails to configure this runs at 8 MHz default.
Compliance Information
RoHS compliant per Microchip product page. -40C to +85C industrial temperature range; not AEC-Q100 qualified for automotive applications.
