PIC32MX130F256B-50I/SP - 50MHz 32-bit MCU 256KB Flash 28-SPDIP | Microchip
MPN: PIC32MX130F256B-50I/SP ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $5.3 | $5.30 |
| 10 | $4.78 | $47.80 |
| 100 | $4.12 | $412.00 |
| 500 | $3.55 | $1,775.00 |
| 1,000 | $3.1 | $3,100.00 |
PIC32MX130F256B-50I/SP Overview
A 32-bit microcontroller (MCU) is a programmable logic device built around a 32-bit data path, instruction pipeline and address space, in contrast to 8-bit or 16-bit MCUs. The PIC32MX1XX/2XX family belongs to the broader hierarchy MCU -> microcontroller -> embedded controller -> semiconductor IC, and is intended for connected, low-power, mixed-signal embedded designs. The M4K core is a MIPS32 instruction-set RISC processor with hardware multiply/divide and a 5-stage pipeline; this combination gives PIC32MX parts their distinctive price/performance position versus Cortex-M0/M3 alternatives.
Key features that differentiate the PIC32MX130F256B include 256 KB flash for application code, 16 KB SRAM for data, a Charge Time Measurement Unit (CTMU) for mTouch capacitive touch and 1 ns high-resolution time measurement, and a USB 2.0 full-speed OTG peripheral on the larger-pin variants. The 28-SPDIP package exposes 21 general-purpose I/O pins through the PPS mapper, so almost any digital peripheral function can be routed to almost any pin - a flexibility advantage versus fixed-pin MCUs. The integrated 10-bit 1 Msps ADC with up to 13 analog channels supports mixed-signal sensing without an external converter.
Architecturally, the part uses a single-cycle 32-bit ALU with hardware MAC for DSP-style operations, 32 KB instruction cache to accelerate flash execution, and a bus matrix that lets DMA and the CPU access peripherals in parallel. Compared with 8-bit PIC16/PIC18 parts running at the same clock, the M4K core delivers roughly 10x more DMIPS per MHz, so designers can either drop clock frequency to save power or run complex TCP/IP and USB stacks that simply do not fit on an 8-bit MCU.
Typical applications include USB human-interface devices, mTouch capacitive touch panels, low-cost graphics with PMP, audio codec front-ends via I2S, and general-purpose connected sensor nodes. Industrial automation HMI panels and consumer appliances also benefit from the 5V-tolerant I/O on many pins of the SPDIP variant.
When designing with this part, remember that the SPDIP package is intended for through-hole prototyping, hand-repair-friendly designs, and harsh-environment sockets where mechanical retention matters. Decouple VDD with a 100 nF ceramic plus a 4.7 uF bulk cap placed within 5 mm of the pins, and configure the Configuration Words in code so the device does not latch up on first power-up. The PPS mapper must be unlocked before peripheral remapping takes effect.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes for the PIC32MX130F256B-50I/SP that are not assembled in the manufacturer datasheet alone.
Drop-in alternatives for PIC32MX130F256B-50I/SP — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC32MX130F256B-50I/SP (same form factor and footprint) — differing in Package, Operating Temperature, USB, ADC, Mounting Type.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC32MX130F256B-I/SP
✅ Drop-In📋 Reference alternative (not in catalog)
PIC32MX150F256B-50I/SP
✅ Drop-In📋 Reference alternative (not in catalog)
PIC32MX170F256B-50I/SP
✅ Drop-In✓ In Stock
$4.55 / Unit
View Datasheet →PIC32MX130F256B-50I/SS
✅ Drop-In✓ In Stock
$3.85 / Unit
View Datasheet →PIC32MX130F256BT-50I/SP
✅ Drop-In📋 Reference alternative (not in catalog)
PIC32MX130F256B-V/SP
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
PIC32MX130F256B-50I/SP Maximum Ratings & Electrical Characteristics
| Core | MIPS32 M4K 32-bit RISC |
| Maximum CPU Speed | 50 MHz (83 DMIPS) |
| Program Memory (Flash) | 256 KB (256K x 8) |
| Data Memory (SRAM) | 16 KB |
| Package | 28-pin SPDIP (0.300 inch, 7.62 mm) |
| Pin Count | 28 |
| Supply Voltage (VDD) | 2.3 V to 3.6 V |
| I/O Pins | 21 |
| ADC | 10-bit, up to 1 Msps |
| ADC Channels | Up to 13 analog inputs |
| I2S/SPI Modules | 2 |
| UART Modules | Up to 2 |
| I2C Modules | Up to 2 |
| Timers | 5 16-bit or 2 16-bit + 1 32-bit |
| Operating Temperature | -40 C to +85 C (Industrial, -I suffix) |
| Active Current | 0.5 mA/MHz typical |
| Peripheral Pin Select (PPS) | Yes |
| Parallel Master Port (PMP) | Yes |
| CTMU (mTouch / 1 ns time measurement) | Yes |
| Mounting Type | Through-Hole |
| RoHS Status | Compliant |
PIC32MX130F256B-50I/SP Pin Configuration
| Pin 1 | MCLR — Master Clear (reset) input, active low |
| Pin 2 | RA0 — I/O port A bit 0 (also PGED1/AN0/CMP1/CTED1) |
| Pin 3 | RA1 — I/O port A bit 1 (also PGEC1/AN1/CMP2/CTED2) |
| Pin 4 | RB0 — I/O port B bit 0 (also AN2/C1IN-/CVREF/RP0) |
| Pin 5 | RB1 — I/O port B bit 1 (also AN3/C1IN+/C2IN+/RP1) |
| Pin 6 | RB2 — I/O port B bit 2 (also AN4/C1IN-/C2IN-/RP2) |
| Pin 7 | RB3 — I/O port B bit 3 (also AN5/C1OUT/RP3) |
| Pin 8 | VSS — Ground reference |
| Pin 9 | RB4 — I/O port B bit 4 (also AN6/C2OUT/RP4) |
| Pin 10 | RB5 — I/O port B bit 5 (also AN7/RP5) |
| Pin 11 | RB6 — I/O port B bit 6 (also PGEC2/RP6) |
| Pin 12 | RB7 — I/O port B bit 7 (also PGED2/RP7) |
| Pin 13 | RA2 — I/O port A bit 2 (also OCM1/RP8) |
| Pin 14 | RA3 — I/O port A bit 3 (also OCM2/RP9) |
| Pin 15 | RA4 — I/O port A bit 4 (also OC4/RP10) |
| Pin 16 | RA5 — I/O port A bit 5 (also OCM5/RP11) |
| Pin 17 | RA6 — I/O port A bit 6 (also OCM6/RP12) |
| Pin 18 | RA7 — I/O port A bit 7 (also OC7/RP13) |
| Pin 19 | VSS — Ground reference |
| Pin 20 | VDD — Positive supply voltage (2.3V to 3.6V) |
| Pin 21 | RB8 — I/O port B bit 8 (also AN8/RP14) |
| Pin 22 | RB9 — I/O port B bit 9 (also AN9/RP15) |
| Pin 23 | RB10 — I/O port B bit 10 (also CVREF10/AN10/RP16) |
| Pin 24 | RB11 — I/O port B bit 11 (also AN11/RP17) |
| Pin 25 | RB12 — I/O port B bit 12 (also AN12/RP18) |
| Pin 26 | RB13 — I/O port B bit 13 (also AN13/RP19) |
| Pin 27 | RB14 — I/O port B bit 14 (also CVREF14/AN14/RP20) |
| Pin 28 | RB15 — I/O port B bit 15 (also AN15/OCFA/RP21) |
Typical Applications
PIC32MX130F256B-50I/SP is suitable for 6 applications: USB Human Interface Devices (HID), mTouch Capacitive Touch Panels, Industrial Sensor Hubs and HMI, Audio Codec Front-Ends (I2S), Low-Cost Graphics with PMP, Connected Sensor Nodes and IoT Endpoints.
USB Human Interface Devices (HID)
The PIC32MX130F256B-50I/SP suits USB HID peripherals such as keyboards, mice, game controllers, and custom input devices when paired with an external USB-serial bridge like the MCP2200. With 256 KB flash and 16 KB SRAM, the part has ample headroom for USB HID class descriptors, HID report parsing, and feature-rich firmware including macros and lighting control. The 50 MHz MIPS M4K core delivers 83 DMIPS, sufficient to debounce switches, sample capacitive touch, and execute composite HID reports (keyboard + mouse + consumer control) simultaneously. Place a 100 nF decoupling capacitor within 5 mm of each VDD pin and route the D+/D- lines to the bridge IC as a differential pair.
Recommended
mTouch Capacitive Touch Panels
The PIC32MX130F256B-50I/SP integrates Microchip's CTMU (Charge Time Measurement Unit), which enables mTouch capacitive touch buttons, sliders, and proximity sensors with 1 ns time measurement resolution. This eliminates the need for an external touch controller IC, reducing BOM cost on small keypads, appliance front panels, and consumer devices. The CTMU drives the sense electrodes directly via I/O pins and measures the discharge timing through the internal ADC, giving reliable touch detection through up to 3 mm of glass or acrylic. With 21 I/O pins available on the SPDIP package, a 12-button keypad plus 4-LED backlight plus UART debug channel fits comfortably.
Recommended
Industrial Sensor Hubs and HMI
Industrial sensor hubs and HMI panels benefit from the PIC32MX130F256B-50I/SP's industrial -40C to +85C temperature range, 256 KB flash for protocol stacks, and the Parallel Master Port (PMP) for driving small TFT/LCD graphical displays. The 10-bit ADC handles 4-20 mA loop and 0-10 V sensor interfaces without an external converter, and the 5 timer/capture modules support PWM-driven buzzer/motor control and quadrature encoder inputs. For panel meters, the 32-bit CPU runs the float-point HVAC control loop while the PMP continuously refreshes the LCD. The two I2S/SPI ports handle audio codecs or external sensor chips simultaneously.
Recommended
Audio Codec Front-Ends (I2S)
The PIC32MX130F256B-50I/SP's dual I2S/SSI modules let it act as a front-end controller for audio codecs in sound bars, intercoms, and hearing-aid accessories. The 50 MHz MIPS M4K core can drive a 48 kHz stereo I2S stream while simultaneously decoding MP3 or AAC from SPI flash with comfortable CPU headroom. The 16 KB SRAM fits several hundred milliseconds of buffered audio for level smoothing and compressor functions. For higher sample-rate designs (96 kHz, 192 kHz) the PIC32MX170 with DMA-driven I2S is preferred, but at standard 48 kHz the PIC32MX130 is more than capable.
Recommended
Low-Cost Graphics with PMP
The PIC32MX130F256B-50I/SP's Parallel Master Port (PMP) drives small graphical TFT displays (up to QVGA 320x240 with external frame buffer) for low-cost HMI panels, e-reader front-ends, and simple graphical control surfaces. The PMP transfers a full row of pixel data in a single cycle, so the 50 MHz core can refresh a 320x240 RGB565 display at over 30 fps when paired with an SPI-based frame buffer. Compared to using SPI alone, the PMP interface gives a 4-8x throughput improvement, enabling animations and smooth touch response. The 256 KB flash holds the small embedded graphics library plus the application UI.
Recommended
Connected Sensor Nodes and IoT Endpoints
The PIC32MX130F256B-50I/SP fits battery-powered connected sensor nodes where modest compute headroom is needed for sensor fusion, local decision making, and protocol framing. Combined with an external sub-GHz transceiver (e.g., MRF89XA) or Wi-Fi module (e.g., ATWINC1500), the MCU serves as the application processor that samples sensors via the 10-bit ADC, processes data locally with the MIPS M4K core, and forwards alerts over UART/SPI. The deep-sleep mode plus peripheral activity gating keeps average current under 1 mA in typical duty-cycled designs, so 2xAA batteries can power the node for months. The 256 KB flash accommodates full LoRaWAN or MQTT-SN client stacks.
Recommended
Recommended Products Summary
Engineering reference data for PIC32MX130F256B-50I/SP — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC32MX130F256B-I/SP | PIC32MX150F256B-50I/SP | PIC32MX170F256B-50I/SP | PIC32MX130F256B-50I/SS |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 28-SPDIP | 28-SPDIP - same | 28-SPDIP - same | 28-SPDIP - same | 28-SSOP - footprint differs |
| Maximum Clock Speed | 50 MHz (83 DMIPS) | 40 MHz (-20%) | 50 MHz (same) | 50 MHz (same) | 50 MHz (same) |
| Flash Memory | 256 KB | 256 KB (same) | 256 KB (same) | 256 KB (same) | 256 KB (same) |
| SRAM | 16 KB | 16 KB (same) | 16 KB (same) | 16 KB (same) | 16 KB (same) |
| ADC | 10-bit, 1 Msps | 10-bit (same) | 10-bit, 12-bit option on larger pin variants | 10-bit, 12-bit option on larger pin variants | 10-bit (same) |
| Operating Temperature | -40 C to +85 C (Industrial) | -40 C to +85 C (same) | -40 C to +85 C (same) | -40 C to +85 C (same) | -40 C to +85 C (same) |
| I/O Pins | 21 | 21 (same) | 21 (same) | 21 (same) | 21 (same) |
| USB Peripheral | No | No | No (only on 64-pin variants) | Yes (on 64-pin variants) | No |
Key Differentiators
- Through-hole 28-SPDIP industrial-grade option (vs PIC32MX130F256B-50I/SS)
- Firmware-compatible upgrade path with more peripherals (vs PIC32MX150F256B-50I/SP)
- 50 MHz speed grade vs 40 MHz baseline (vs PIC32MX130F256B-I/SP)
Design Notes
The PIC32MX130F256B-50I/SP operates from a single 2.3V to 3.6V supply on the VDD pin, drawing 0.5 mA/MHz typical active current. Estimated: at 50 MHz with all peripherals active, core current is ~25 mA; add another 20-30 mA for I/O switching and analog blocks. Place a 100 nF ceramic decoupling capacitor within 5 mm of each VDD pin and a 4.7 uF bulk capacitor at the board supply input. For low-noise analog work, use a separate LDO (e.g., MCP1700) for the analog VDD rail even though the SPDIP-28 only exposes one VDD pin.
The SPDIP-28 footprint is 0.300 inch (7.62 mm) row spacing with 0.100 inch (2.54 mm) pitch. Route the ICSP programming pins (PGEC1/PGED1 on RA0/RA1) directly to a 6-pin header with no series components, since in-circuit programming requires direct access to these pins. Keep crystal traces short (under 10 mm) and surround the OSC1/OSC2 pins with a ground pour to minimize EMI pickup. Place the bulk decoupling capacitor near the VDD pin, and provide a ground-return path directly under the MCU for return currents.
Do not skip the Configuration Word setup in firmware - leaving the default Configuration Words causes the device to latch up on first power-up or fail to start the oscillator. The Peripheral Pin Select (PPS) registers must be unlocked (CFG_PPS) before any peripheral remapping takes effect; otherwise the peripheral output simply does not appear on the chosen pin. Do not assume a 50 MHz crystal will work in all board layouts - if the load capacitance is mismatched the oscillator can fail to start at low temperature. Always tie MCLR high through a 10 kohm pull-up and provide a 100 nF cap on MCLR for clean reset.
Compliance Information
RoHS and REACH compliant per Microchip product page. Halogen-free SPDIP-28 package. No AEC-Q100 grade available on this MPN - automotive designs should select PIC32MX1XX/2XX AEC-Q100 qualified variants. Lead-free reflow-compatible packaging.
