TC7109IJL - 12-bit + Sign Dual-Slope ADC | Microchip | 40-CERDIP
MPN: TC7109IJL ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $18.5 | $18.50 |
| 10 | $16.25 | $162.50 |
| 100 | $13.8 | $1,380.00 |
| 500 | $11.95 | $5,975.00 |
| 1,000 | $10.4 | $10,400.00 |
TC7109IJL Overview
An integrating ADC (also called dual-slope or multi-slope converter) is a class of analog-to-digital converter that integrates the input signal over a fixed period and then measures the time required to de-integrate against a reference voltage. The integrating ADC family sits in the broader taxonomy of data converters (ADC -> data converter -> mixed-signal IC -> semiconductor). Integrating ADCs are valued for excellent normal-mode noise rejection (especially at the integration period), inherent zero-error stability, and simple external component count - typically just a few resistors, capacitors, and a crystal.
Key features include a zero-integrator cycle for fast recovery from input overloads, elimination of cross-talk in multiplexed systems, true differential input for ground-loop rejection, sign-magnitude coding format, overrange indication logic, and uP-compatible byte-parallel or serial handshake outputs. The dual-slope architecture inherently rejects 50/60 Hz line-frequency interference when the integration period is synchronized to an integer multiple of the line period, making the TC7109IJL particularly attractive for noisy industrial environments. Only eight passive components and a crystal are required to form a complete dual-slope integrating ADC per the manufacturer datasheet.
Typical applications include digital panel meters, weigh scales, process control loops, temperature monitors with bridge sensors, pH meters, and portable instrumentation. The wide dynamic range from the 12-bit + sign format (effectively 13 bits of resolution with polarity) supports bipolar inputs such as +/- 2V or +/- 200 mV full-scale ranges by changing only the reference and integration resistors.
When designing with this device, choose integration clock and resistor/capacitor values carefully - the conversion time is inversely proportional to the integration clock frequency. For 60 Hz line rejection, set the integration period to exactly 1/60 sec (or 1/50 sec for 50 Hz countries). Use a low-temperature-coefficient reference for absolute accuracy. Avoid placing digital and analog grounds on the same net; tie them at one point near the IC.
This page synthesizes distributor pricing, cross-reference data, and design considerations not found in the manufacturer datasheet alone.
Drop-in alternatives for TC7109IJL — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with TC7109IJL (same form factor and footprint) — differing in Mounting Type.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
TC7109IJL
✅ Drop-In✓ In Stock
$10.4 / Unit
View Datasheet →ICL7109CPL+
✅ Drop-In📋 Reference alternative (not in catalog)
ICL7109CMH+T
✅ Drop-In✓ In Stock
$11.45 / Unit
View Datasheet →MAX1302ECM/V+
✅ Drop-In📋 Reference alternative (not in catalog)
TC7109IJL Maximum Ratings & Electrical Characteristics
| Number of Bits | 12 (+ sign, effective 13-bit with polarity) |
| Input Channels | 1 differential input |
| Architecture | Dual-slope integrating |
| Data Interface | Serial, Parallel (uP-compatible) |
| Number of A/D Converters | 1 |
| Output Coding | Sign-magnitude |
| Differential Input | Yes (true differential) |
| Overrange Indication | Yes |
| Zero Integrator Cycle | Yes (fast overload recovery) |
| Package / Case | 40-CDIP / CERDIP (0.600 inch, 15.24 mm) |
| Mounting Type | Through-Hole |
| Packaging | Tube |
| Operating Temperature | -25C to +85C |
| External Components Required | 8 passives + crystal |
| Polarity | Bipolar (sign-magnitude output) |
TC7109IJL 40-cdip / cerdip (0.600 inch, 15.24 mm) Pin Configuration Guide
Pin configuration for TC7109IJL (40-cdip / cerdip (0.600 inch, 15.24 mm) package). This analog component features input, output, and power supply pins. Refer to the manufacturer datasheet for offset null, compensation, and enable pin configurations. Ideal for signal conditioning and amplifier circuits.
No detailed pinout data available for TC7109IJL.
Refer to the datasheet for full pin configuration.
Typical Applications
TC7109IJL is suitable for 7 applications: Digital Panel Meter (DPM), Industrial Weigh Scale, Process Control Loop Monitor, Bench-Top Digital Multimeter, Temperature Monitor with Bridge Sensor, pH Meter and Ion-Selective Electrode, Portable Battery-Powered Instrumentation.
Digital Panel Meter (DPM)
The TC7109IJL is a classic choice for digital panel meters in industrial equipment because its 12-bit plus sign dual-slope integrating ADC drives 3.5-digit or 4.5-digit LED/LCD displays directly through BCD and sign-magnitude outputs. The bipolar +/-2V or +/-200mV input ranges cover typical transducer outputs from strain gauges, thermocouple amplifiers, and current shunts without external level shifting. The integrating architecture inherently rejects 50/60 Hz line-frequency interference when the integration period is synchronized to 1/60 sec or 1/50 sec, allowing accurate readout in electrically noisy factory-floor environments. Only eight passive components and a crystal complete the design, minimizing BOM cost and PCB area for high-volume DPM production.
Recommended
Industrial Weigh Scale
Load-cell weigh scales benefit from the TC7109IJL's true differential input and bipolar +/-2V range, which directly digitize the bridge output of a strain-gauge load cell with no external instrumentation amplifier needed in many designs. The dual-slope integrating conversion rejects conveyor and motor noise typical of industrial scales, yielding stable readings under mechanical vibration. Sign-magnitude output makes zero-center tare display trivial, and the overrange flag protects against overload events. The through-hole CERDIP package survives the long operating life expected of commercial weigh-scale equipment in retail and warehouse environments.
Recommended
Process Control Loop Monitor
Process control loops monitoring 4-20 mA current loops, RTD outputs, or thermocouple amplifier signals are well served by the TC7109IJL's low noise, bipolar input, and inherent 50/60 Hz line rejection. The integration period can be programmed for optimum rejection of local line frequency, and the zero-integrator cycle feature allows fast recovery from input overvoltage transients common during industrial relay switching or motor start-up. Sign-magnitude output simplifies comparison against setpoint thresholds in PLC and SCADA interfaces. The -25C to +85C industrial operating range supports deployment in control cabinets without additional thermal management.
Recommended
Bench-Top Digital Multimeter
Bench-top multimeters use the TC7109IJL for DC voltage and current ranges where its bipolar input handles positive and negative readings directly and its low noise floor delivers 4.5-digit-class resolution. The dual-slope topology's inherent line rejection means an unfiltered power supply does not degrade reading stability - a key advantage over SAR ADCs in cost-sensitive bench instruments. The serial and parallel outputs allow both legacy BCD panel displays and modern uP-based autoranging displays to share the same ADC. The through-hole CERDIP package supports long product lifecycles expected of professional test equipment.
Recommended
Temperature Monitor with Bridge Sensor
Temperature monitoring systems using bridge-style sensors (platinum RTD, thermistor bridge, or semiconductor bridge) benefit from the TC7109IJL's differential input that cancels common-mode bridge offset and its sign-magnitude output that natively displays readings above and below a calibration midpoint. The integrating conversion inherently averages thermal noise and supply ripple, giving stable temperature readings in electrically noisy enclosures. The overrange flag triggers alarm logic when temperature exceeds safe limits. The CERDIP package's thermal stability matches the long-term drift expectations of calibrated temperature instrumentation.
Recommended
pH Meter and Ion-Selective Electrode
Laboratory and process pH meters use the TC7109IJL for its high-impedance differential input that interfaces directly with the high-impedance glass electrode, paired with the integrating conversion's natural averaging of chemical sensor noise. The bipolar +/-2V input range covers the typical pH electrode output of approximately +/- 414 mV (at 59 mV per pH unit, pH 0 to pH 14). Sign-magnitude output simplifies the +/- pH display convention. The hermetic CERDIP package supports the long product lifecycles of laboratory and process analytical instrumentation, where equipment is often certified for 10+ year service intervals.
Recommended
Portable Battery-Powered Instrumentation
Handheld battery-powered instruments - including portable multimeters, field calibrators, and remote data loggers - benefit from the TC7109IJL's CMOS low-power architecture that extends operating time on a single battery charge. The dual-slope conversion allows the device to enter standby between conversions, reducing average current draw. The through-hole CERDIP package is rugged enough for field-portable use, and the integrating topology's noise immunity prevents false readings from conducted EMI in industrial field environments. Sign-magnitude output simplifies the bipolar readings common in differential measurements.
Recommended
Recommended Products Summary
Engineering reference data for TC7109IJL — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | ICL7109CPL+ | ICL7109CMH+T | MAX1302ECM/V+ |
|---|---|---|---|---|
| Brand | Microchip Technology | Renesas (Intersil heritage) | Renesas (Intersil heritage) | Analog Devices |
| Package | 40-CERDIP (0.600 inch) | 40-PDIP (plastic DIP) | 40-CERDIP (same form factor) | Through-hole industrial grade 40-pin equivalent |
| Resolution | 12-bit + sign (effective 13-bit) | 12-bit + sign (same) | 12-bit + sign (same) | 14-bit (no sign) |
| Architecture | Dual-slope integrating | Dual-slope integrating (same) | Dual-slope integrating (same) | SAR |
| Input Channels | 1 differential | 1 differential | 1 differential | Multi-channel |
| Operating Temperature | -25C to +85C | 0C to +70C (commercial) | -25C to +85C | -40C to +85C |
| Output Coding | Sign-magnitude | Sign-magnitude | Sign-magnitude | Two's complement binary |
| Mounting Type | Through-Hole (CERDIP) | Through-Hole (PDIP) | Through-Hole (CERDIP) | Through-Hole / SMD variant |
| External Components | 8 passives + crystal | 8 passives + crystal | 8 passives + crystal | Minimal - reference + decoupling |
Key Differentiators
- Drop-in same-architecture alternatives available from same TC7109 die (vs ICL7109CMH+T (Renesas))
- Same-die second-source via PDIP at lower cost (vs ICL7109CPL+ (Renesas))
- Integrating topology with inherent 50/60 Hz line rejection (vs MAX1302ECM/V+ (SAR architecture))
Design Notes
The TC7109IJL operates from dual supplies (V+ and V-) plus a logic supply; per Microchip's TC7109 datasheet, typical supply currents are low because the CMOS integrating architecture draws power mainly during the integration/de-integration phases. Place 0.1 uF decoupling capacitors close to each supply pin and a 10 uF bulk capacitor at the board entry point to suppress digital switching noise from leaking into the analog integration capacitor. Use a star-ground topology tying analog ground and digital ground at a single point near the IC's GND pin.
Estimated: a common pitfall is choosing the integration clock and resistor/capacitor values without first computing the actual conversion time. The conversion rate equals the clock frequency divided by the total count per conversion; for 60 Hz line-frequency rejection, set the integration period to exactly 1/60 sec (16,667 counts per integration at a 1 MHz clock). Using a non-integer multiple yields degraded line rejection. Also avoid sharing the integration capacitor's ground with high-current digital returns - this injects ground noise that the integrating topology averages but cannot fully reject.
Place the integration capacitor (typically 0.1 to 1 uF polypropylene or polyester for low dielectric absorption) as close as possible to the integration pin to minimize leakage paths and stray capacitance. Keep digital output traces away from the analog input pins and the integration capacitor traces to avoid capacitive coupling of switching noise into the sensitive analog integrator node. The reference voltage input should be bypassed with a 0.1 uF ceramic capacitor to analog ground to filter reference noise.
Estimated: with a typical 1 MHz integration clock and 4096 counts per integration period, the conversion time is approximately 4 ms per conversion (plus de-integration time proportional to input magnitude). For 60 Hz line-frequency rejection, choose integration clock frequency and divide ratio such that the integration period is an integer multiple of 16.67 ms - typically 16,672 counts at 1 MHz gives 60.0 Hz rejection. Confirm the actual clock frequency with a frequency counter rather than relying on the crystal nominal value alone.
Use a guard ring or guard trace tied to analog ground around the differential input traces and the integration capacitor node to intercept leakage currents from the PCB substrate. The CERDIP package's through-hole leads allow simple guard-ring routing on a single PCB layer. For industrial temperature designs (-25C to +85C), use COG/NP0 ceramic capacitors for the integration and auto-zero capacitors rather than X7R or Y5V, whose capacitance shifts with temperature and voltage can degrade conversion accuracy.
Compliance Information
RoHS/REACH status for the CERDIP-package TC7109IJL is not explicitly stated in the verified web data; legacy ceramic-package parts are often non-RoHS due to lead-containing ceramic seals. Industrial temperature grade (-25C to +85C) is not AEC-Q100 qualified; this part is not intended for automotive applications.
