EP1AGX20CF484C6 vs EP1AGX20CF484C6NGA مقارنة
مقارنة تفصيلية جنبًا إلى جنب لـ EP1AGX20CF484C6 بواسطة Intel و EP1AGX20CF484C6NGA بواسطة Intel. قارن المواصفات الرئيسية والمعلمات الكهربائية والتغليف وحالة دورة الحياة والأسعار والتوافر لتحديد أفضل مكوّن لمتطلبات تصميمك.
مقارنة المواصفات
| المعامل | EP1AGX20CF484C6 | EP1AGX20CF484C6NGA |
|---|---|---|
| العلامة التجارية | Intel | Intel |
| الفئة | FPGA & CPLD | FPGA & CPLD |
| حالة دورة الحياة | Obsolete | NRND |
| Family | Arria GX | Intel Arria GX FPGA |
| Logic Elements (LEs) | 20,000 (approx.) | — |
| Number of CLBs / LABs | 21,580 / 1079 | — |
| Total Memory Bits | 1,229,184 bits | — |
| Maximum User I/O | 230 | — |
| العلبة | 484-FBGA (Fine-Pitch Ball Grid Array) | — |
| Package Dimensions | 23 x 23 mm, 1.0 mm ball pitch | — |
| Internal Fabric Frequency (max) | 640 MHz | — |
| Speed Grade | C6 (commercial temperature range) | -6 |
| Process Technology | 90 nm | — |
| Supply Voltage (core, typical) | 1.2 V (refer to datasheet) | — |
| Transceivers | Integrated multi-gigabit SerDes blocks | Up to 8 high-speed SERDES channels |
| PLLs | Yes (on-chip, refer to datasheet for count) | — |
| Embedded Memory Blocks | M512, M4K, M-RAM | — |
| DSP / Multiplier Blocks | Hardware multipliers (refer to datasheet) | — |
| Configuration Method | External flash / Quartus II | SRAM, JTAG, EPCS flash |
| نوع التركيب | Surface Mount | Surface Mount |
| حالة RoHS | Lead-Free (per datasheets.com listing) | [DATA_NEEDED: RoHS compliance status] |
| Series | — | Arria GX |
| Logic Elements (LE) | — | 21,580 |
| Total RAM Bits | — | 1,229,184 |
| User I/O Pins | — | 230 |
| العلبة / الحالة | — | 484-FBGA (23x23 mm) |
| Supplier Device Package | — | 484-FBGA (23x23) |
| Core Voltage - Supply | — | 1.15 V to 1.25 V |
| درجة حرارة التشغيل | — | [DATA_NEEDED: industrial temp range] |
| مستوى MSL | — | [DATA_NEEDED: moisture sensitivity level] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Hardware Multipliers | — | Embedded 18x18 multipliers |
| PLL Count | — | [DATA_NEEDED: number of PLLs] |