EP20K400GI655-2X vs EP20K400GI655-3 مقارنة
مقارنة تفصيلية جنبًا إلى جنب لـ EP20K400GI655-2X بواسطة Intel و EP20K400GI655-3 بواسطة Altera. قارن المواصفات الرئيسية والمعلمات الكهربائية والتغليف وحالة دورة الحياة والأسعار والتوافر لتحديد أفضل مكوّن لمتطلبات تصميمك.
مقارنة المواصفات
| المعامل | EP20K400GI655-2X | EP20K400GI655-3 |
|---|---|---|
| العلامة التجارية | Intel | Altera |
| الفئة | FPGA & CPLD | FPGA & CPLD |
| حالة دورة الحياة | Obsolete | Obsolete |
| Series | APEX-20K | — |
| Family | APEX-20K (loadable PLD / FPGA) | APEX 20KE |
| Logic Elements (LEs) | 16,640 | — |
| System Gates | 400,000 | 400,000 (maximum) |
| Maximum User I/O | 502 | 502 |
| Total I/O Lines | 496 (bidirectional) + 4 (dedicated inputs) | — |
| Embedded Memory (bits) | 212,992 | — |
| Nominal Core Supply Voltage | 2.5 V | — |
| Supply Voltage Range | 2.375 V to 2.625 V | — |
| I/O Supply Voltages | 2.5 V / 3.3 V | — |
| Process Technology | CMOS | CMOS, 2.5V core |
| Propagation Delay (typical, -2 grade) | 3.1 ns | — |
| العلبة | 655-ball FineLine BGA (SPGA655, 47x47 mm) | 655-Pin PGA (Plastic/CPGA, square) |
| Package Code | SPGA655, 47x47 | — |
| Surface Mount | Yes (BGA) | — |
| مستوى حساسية الرطوبة (MSL) | 1 | — |
| Operating Temperature (industrial -X grade) | -40C to +85C (industrial) | — |
| حالة RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Qualification | Not Qualified (per distributor listing) | — |
| JTAG Support | IEEE 1149.1 boundary-scan / programming | — |
| Logic Elements / Cells | — | 16,640 |
| Dedicated Inputs | — | 4 |
| Number of Terminals | — | 655 |
| JESD-30 Code | — | S-CPGA-P655 |
| Package Shape | — | Square |
| Form of Terminal | — | PIN/PEG (through-hole) |
| نوع التركيب | — | Through-Hole (Socket) |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 2.5 V or 3.3 V (MultiVolt I/O) |
| درجة حرارة التشغيل | — | 0°C to 70°C (Industrial I grade) |
| Speed Grade | — | -3 (slowest of the EP20K400 family) |
| Configuration Modes | — | Passive Serial, Passive Parallel Asynchronous, JTAG |
| Embedded Memory | — | Dual-port RAM via Embedded System Blocks (ESBs) |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |