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WM8742GEDS/V - 24-Bit 192kHz Stereo DAC | Cirrus Logic
WM8742GEDS/V

WM8742GEDS/V - 24-Bit 192kHz Stereo DAC | Cirrus Logic

The Cirrus Logic WM8742GEDS/V is a 24-bit, 192kHz stereo digital-to-analog converter with advanced digital filtering, packaged in a 28-SSOP. It supports PCM word lengths from 16 to 32 bits and accepts DSD bit-stream data in direct DSD or PCM-converted modes, making it a high-performance audio DAC for professional recording equipment, A/V receivers, and home-theater systems. An audio DAC is a signal-conversion semiconductor that transforms digital PCM or DSD audio samples into analog left- and right-channel voltages. Within the broader integrated-circuit hierarchy, the WM8742 belongs to the ADC/DAC class, operates as an audio data converter, and ultimately supports digital audio playback and signal-chain reconstruction. Its dual-channel architecture provides one analog output channel for each stereo signal while accepting a common digital audio stream. The WM8742’s principal features include 24-bit resolution, operation up to 192kHz, support for 16-bit through 32-bit PCM input, DSD compatibility, advanced digital filtering, and selectable serial-control and hardware-control schemes. The 2/3-wire serial interface provides access to device features, while the hardware interface permits control of a defined subset of functions. These capabilities provide flexibility when pairing the converter with a digital audio processor, receiver, or source device. The WM8742GEDS/V is offered in a 28-SSOP measuring approximately 0.209 inches, or 5.30mm, in width. The manufacturer documentation states that this package is pin compatible with the WM8740 and WM8741, which can simplify board-level family transitions when register behavior, feature requirements, and performance targets are appropriately matched. The serial interface also makes the converter suitable for systems where a compact, multiwire digital connection is preferable to a parallel data bus. Typical applications include professional recording systems, A/V receivers, CD and DVD players, and high-specification home-theater equipment. These systems benefit from the combination of high-resolution PCM support, 192kHz operation, DSD handling, and advanced filtering. In each application, the DAC converts the source device’s digital stream into the analog line-level signals required by subsequent amplifiers, mixers, or output stages. Designers should verify the digital audio interface format, supported master-clock arrangement, analog output implementation, and required bypass components against the manufacturer datasheet before layout. The 28-SSOP footprint demands careful decoupling and short analog routing, while software configuration must match the selected PCM or DSD operating mode to avoid format or clocking errors. This product page organizes the WM8742GEDS/V’s core specifications, family drop-in options, application guidance, package information, and design considerations into a practical engineering reference. It also distinguishes pin-compatible alternatives by documented feature differences, helping designers make informed replacement decisions without confusing electrical compatibility with complete functional equivalence.

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WM8761CBGED - 24-Bit 192kHz Stereo DAC | Cirrus Logic
WM8761CBGED

WM8761CBGED - 24-Bit 192kHz Stereo DAC | Cirrus Logic

The Cirrus Logic WM8761CBGED is a 24-bit stereo digital-to-analog converter for digital audio systems, supporting sampling rates up to 192 kHz and packaged in a 14-pin SOIC. Its serial interface accepts 16-bit to 24-bit data through I2S, right-justified, or DSP formats, while integrated digital interpolation filters, multi-bit sigma-delta modulators, and stereo DAC channels convert decoded digital audio into left- and right-channel analog signals. An audio DAC is a digital-to-analog converter, a specialized interface IC within the ADC/DAC product family and the broader signal-conversion semiconductor hierarchy. Its purpose is to reconstruct continuous analog voltage waveforms from sampled digital audio data. The WM8761 is positioned for consumer and multimedia audio equipment, including DVD systems, home-theater equipment, digital television, and systems receiving decoded AC-3, DTS, or MPEG audio streams. The WM8761 supports data word lengths from 16 to 24 bits and sampling rates up to 192 kHz. Selectable serial-audio formats give the converter flexibility when connecting to different digital-audio decoders, digital signal processors, or microcontrollers. Digital de-emphasis, mute control, and digital interpolation filtering support practical playback-chain integration. A 14-pin SOIC package also keeps the footprint compact relative to older, larger converter implementations. Internally, the device combines a serial interface port with digital interpolation filters, multi-bit sigma-delta modulators, and stereo DAC output stages. The interpolation filters prepare the incoming high-rate digital stream for the DAC stages, while the sigma-delta architecture represents the converted signal using high-resolution noise shaping. The Cirrus Logic manufacturer datasheet identifies the WM8761 as a low-cost stereo converter intended for decoded surround-sound and conventional stereo audio playback. Typical deployments include digital television audio reproduction, DVD-player output, home-theater receiver analog stages, AC-3 and DTS decoder interfaces, and MPEG audio decoder output paths. The I2S interface is particularly useful for digital audio buses, while right-justified and DSP modes accommodate source devices with different data alignment. System designers should match the digital source word length and clocking method to the supported converter configuration. Circuit implementation requires a stable analog and digital supply arrangement, correct master-clock and serial-audio routing, and output-network selection suited to the next analog stage. The 14-pin package should be checked against the manufacturer pin-description table before assigning PCB nets. Designers must also confirm whether the target channel requires mute, de-emphasis, a particular data format, or an external output filter appropriate to the intended audio bandwidth. This product page consolidates the manufacturer specifications, ordering information, application context, design cautions, and sourcing workflow for the WM8761CBGED. It also distinguishes the verified discontinued status of the original device from the separate task of finding a genuinely pin-compatible replacement, avoiding unsupported assumptions about substitute ICs.

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WM8762CGED - 24-Bit 192kHz Stereo DAC | Cirrus Logic
WM8762CGED

WM8762CGED - 24-Bit 192kHz Stereo DAC | Cirrus Logic

Cirrus Logic WM8762CGED is a 24-bit stereo digital-to-analog converter IC operating up to 192 kHz and housed in an 8-pin SOIC package. Verified distributor data identifies it as a serial audio DAC with a 24-bit resolution, 192 kHz capability, and an 8-SOIC format. A DAC is a data-conversion semiconductor that transforms digital audio samples into left- and right-channel analog voltages. In the signal hierarchy, the WM8762CGED belongs to the digital-to-analog converter class, then to the ADC/DAC family and the broader signal-conversion and audio interface categories. Its stereo outputs are suited to audio playback paths in consumer, communications, and embedded audio systems. The verified data identifies three headline characteristics: 24-bit resolution, support for operation up to 192 kHz, and an 8-pin SOIC package. These values position the converter for designs requiring higher-resolution digital audio and a compact surface-mount footprint. The serial interface and stereo output architecture allow a digital audio source to feed two analog channels through one converter IC. The WM8762CGED family is identified in distributor listings as a Wolfson/Cirrus Logic audio DAC. Its practical implementation depends on the host audio interface, clocking scheme, analog output network, supply arrangement, and the format expected by the connected digital source. Exact pin names, voltage ratings, output architecture, and supported digital audio formats require confirmation from the manufacturer datasheet before PCB or firmware design. Typical audio uses include digital audio players, multimedia systems, communications equipment, and embedded sound-control platforms. In a player design, the converter would typically sit between the digital audio processor and an analog output stage feeding headphones or a line-input amplifier. The compact SOIC package can simplify routing where a small surface-mount footprint is important. Designers should verify the datasheet pinout, recommended decoupling, clock requirements, analog output connection, and supported operating conditions. Since the supplied data does not state supply voltage, pin functions, output mode, or digital interface details, those values are intentionally marked as data needed rather than inferred. This page separates verified distributor facts from engineering information that still requires datasheet confirmation. This page consolidates verified distributor references, package identity, audio-resolution information, and selection guidance. It does not treat generic cross-reference results as proof of drop-in replacement; engineering equivalence must be confirmed by package, pinout, electrical limits, and digital-interface compatibility.

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WM8766GEDS/V - 24-Bit 6-Channel 192kHz DAC | Cirrus Logic
WM8766GEDS/V

WM8766GEDS/V - 24-Bit 6-Channel 192kHz DAC | Cirrus Logic

The Cirrus Logic WM8766GEDS/V is a 24-bit, six-channel digital-to-analog converter operating at up to 192 kHz and supporting DSP and I2S audio interfaces. The device is supplied in a 28-pin SSOP package, uses a 2.7 V to 5.5 V supply range, and is specified for -25 °C to 85 °C operation. It is designed for multichannel audio systems requiring multiple synchronized analog outputs. An audio DAC is a data-conversion IC that transforms digital audio samples into corresponding analog voltage signals. In the broader hierarchy, the WM8766GEDS/V is a digital-to-analog converter within the ADC/DAC family of data-converter and signal-conversion integrated circuits. Such devices are commonly positioned between an audio processor and an analog amplification or speaker-output stage, where they translate I2S or DSP data into left, right, and additional multichannel outputs. The principal features of the WM8766GEDS/V include six DAC channels, 24-bit resolution, a maximum sampling rate of 192 kHz, and support for both I2S and DSP serial interfaces. Its 2.7 V to 5.5 V operating supply supports integration with conventional consumer and embedded audio equipment. The 28-pin SSOP package also provides a surface-mount format suitable for automated PCB assembly, although its lead pitch is finer than that of a standard SOIC package. The converter architecture is intended for high-resolution multichannel playback rather than general-purpose signal generation. A 24-bit data path allows the source system to preserve a larger amplitude-resolution range than lower-resolution converters, while operation at 192 kHz supports high-rate digital audio streams. The available I2S interface is useful for standard audio links between a digital signal processor and the DAC, while DSP interface support provides a framed alternative for compatible source components. Typical applications include DVD and home-cinema surround-sound systems, multichannel hi-fi equipment, automotive audio products, and other audiovisual equipment requiring several synchronized DAC outputs. The six-channel architecture is particularly appropriate when left, right, center, surround, and additional playback channels must be generated from one converter package. Designers should confirm the supported clock, audio-interface, supply, and output configuration against the manufacturer datasheet before layout. The 28-pin SSOP footprint requires a land pattern tailored to its 0.65 mm lead pitch, and analog and digital supply routing should follow the decoupling and grounding recommendations in the Cirrus Logic documentation. Pin assignments, output-mode options, and electrical limits must be checked for the selected board revision. This product record combines the verified WM8766GEDS/V channel count, resolution, sampling rate, interface, supply, package, temperature, and lifecycle information with practical integration guidance. It also distinguishes verified drop-in replacements from related Cirrus Logic family members that may differ in temperature grade, order code, or electrical configuration.

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WM8768GEDS/V - 8-Channel 24-Bit 192kHz Audio DAC | Cirrus Logic
WM8768GEDS/V

WM8768GEDS/V - 8-Channel 24-Bit 192kHz Audio DAC | Cirrus Logic

Cirrus Logic WM8768GEDS/V is an 8-channel audio digital-to-analog converter with 24-bit resolution, support for operation up to 192kHz, digital signal processing, volume control, and an I2S interface. The device is supplied in a 28-pin SSOP package and is intended for DVD, surround-sound, home hi-fi, automotive, and other audio-visual equipment. The WM8768 is a multi-channel audio DAC. In the signal-chain hierarchy, it belongs to the digital-to-analog converter category, within ADC/DAC converters and data-converter integrated circuits. Such converters translate digital audio samples into analog voltage signals that drive speakers, headphones, amplifiers, or other analog audio stages. The eight-channel architecture is useful when one system must support several simultaneous audio outputs rather than requiring a separate single-channel converter for each output. The verified distributor descriptions identify the WM8768GEDS/V as an audio DAC with 24-bit resolution, 192kHz maximum sampling capability, DSP processing, I2S connectivity, volume control, and 103dB dynamic range as stated by Mouser. It also identifies the physical format as a 28-pin SSOP. These characteristics make the converter suitable for high-fidelity multichannel playback, receiver and amplifier designs, automotive audio systems, and other applications requiring multiple digital audio channels. The digital interface and integrated DSP distinguish the WM8768 from a simple parallel DAC. I2S is commonly used to connect digital audio sources to converters, while on-chip signal processing and volume control reduce the amount of external processing required for channel management and gain adjustment. The available source material does not provide a complete electrical description of the DSP filters, clocks, output architecture, analog supply limits, or digital I/O levels; these details must therefore be confirmed in the manufacturer datasheet before schematic capture. A typical design would accept I2S audio from a source processor, configure the converter for the desired channel map and sample rate, and route the analog outputs toward line-level amplification. Decoupling and output filtering must follow the manufacturer reference circuit. Because the verified data does not include capacitor values or a full pin assignment, engineers should not infer those values from generic audio guidance. The WM8768GEDS/V is appropriate when the design needs an integrated eight-channel, high-resolution audio DAC rather than a low-channel-count codec. It is also relevant to CD, DVD, home theater, automotive infotainment, and powered-speaker systems, provided the system clocking, supported sample-rate configuration, and analog output topology match the finished board. Current distributor listings show the part available through major electronics distributors, while detailed pricing and lifecycle terms should be checked against live inventory. This page consolidates the verified 24-bit, 192kHz, eight-channel, DSP, I2S, volume-control, 103dB, and SSOP-28 facts while separating confirmed data from missing technical details. It also identifies same-family alternatives and provides practical design cautions for clocking, filtering, grounding, and supply decoupling without inventing unverified component values.

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WM8775SEDS/V 24-Bit 96kHz Stereo ADC | Cirrus Logic
WM8775SEDS/V

WM8775SEDS/V 24-Bit 96kHz Stereo ADC | Cirrus Logic

The Cirrus Logic WM8775SEDS/V is a high-performance stereo audio analog-to-digital converter with a 24-bit resolution, a maximum sampling rate of 96 kHz, and a four-channel input multiplexer. The device is packaged in a 28-pin SSOP and is designed for digitizing multiple analog audio sources used in home hi-fi, automotive, and audiovisual equipment. An audio ADC is an integrated circuit that converts analog audio voltages into a digital representation for processing, storage, transmission, or playback. The WM8775 belongs to the broader ADC and DAC product category, specifically a multiplexed stereo audio ADC. Its four-channel input mixer allows several analog sources to be selected and digitized through the same conversion engine, reducing the need for separate converters when a system must process multiple audio inputs. The primary verified specifications for the WM8775SEDS/V are its 24-bit conversion resolution, 96 kHz sampling capability, stereo ADC architecture, four-channel input multiplexer, I2S digital interface, and 28-pin SSOP package. According to the manufacturer-linked datasheet information in the verified sources, the device is intended for high-performance audio digitization and surround-sound processing applications. The manufacturer datasheet is the authoritative source for detailed electrical limits, clock requirements, analog input ranges, digital timing, recommended application circuits, and package dimensions. Typical application areas include surround-sound processors, home audio equipment, automotive audio systems, and other audiovisual products that require multiple analog audio inputs to be converted into a digital format. In these systems, the multiplexer can select different source signals while the stereo ADC performs the actual conversion. The I2S interface supports integration with digital audio processors, decoders, receivers, and other equipment using compatible serial audio connections. Designers should verify the WM8775SEDS/V pinout, analog input configuration, clocking requirements, digital interface timing, supply recommendations, and decoupling requirements against the manufacturer datasheet before layout. Because the available verified material is primarily distributor and indexed-datasheet information rather than a complete numerical electrical table, unspecified values are marked as [DATA_NEEDED] rather than inferred. The SSOP footprint also requires attention to thermal performance, lead spacing, soldering profile, and analog signal routing. This page combines verified distributor identification, datasheet indexing, package information, application context, comparison structure, and engineering design guidance. It distinguishes documented facts from parameters that require confirmation in the official WM8775 datasheet, helping engineers identify the correct 24-bit, 96 kHz multiplexed stereo ADC without relying on unsupported assumptions.

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WM8781GEDS/V - 24-Bit Stereo ADC | Cirrus Logic | Audio
WM8781GEDS/V

WM8781GEDS/V - 24-Bit Stereo ADC | Cirrus Logic | Audio

Cirrus Logic WM8781GEDS/V is a 24-bit, 192 kHz stereo audio ADC with I2S support, supplied in a 20-pin SSOP package. Its headline specifications are a 24-bit conversion resolution, a maximum sampling rate of 192 kHz, stereo conversion capability, and a 2.7 V to 3.6 V analog supply range. The device also supports 384FS master mode according to the manufacturer product information. These characteristics place it in the high-resolution audio ADC category and make it suitable for digital audio equipment requiring simultaneous left- and right-channel conversion. An ADC is an analog-to-digital converter, a mixed-signal integrated circuit that samples an analog audio voltage and produces a corresponding digital representation. Within the wider semiconductor hierarchy, the WM8781GEDS/V is an audio ADC, a type of data-converter IC and interface IC used for digital audio capture. Its I2S interface provides a conventional connection to digital audio processors, while the 24-bit resolution preserves substantially more amplitude detail than lower-resolution converters. The 192 kHz maximum sampling rate supports high-resolution digital audio workflows and exceeds the 48 kHz rate commonly used for CD-quality playback. The 384FS master-mode capability adds clocking flexibility for systems in which the converter must organize digital audio timing. Stereo operation consolidates two audio channels in one package, reducing the number of separate converters needed in a two-channel audio path. The WM8781GEDS/V operates from a 2.7 V to 3.6 V supply and is specified for an operating temperature range of -25°C to +85°C. Its 20-SSOP package is approximately 5.30 mm wide and 0.209 inch, providing a surface-mount implementation for compact audio products. The supplied distributor information does not provide the complete electrical limits, analog input range, clock requirements, pin mapping, or package height. Typical applications include digital recording equipment, professional audio interfaces, consumer playback systems, active loudspeakers, audio expansion modules, and embedded media platforms. The device can sit between analog microphone or line-level front ends and an I2S-capable DSP, codec, or digital audio controller, converting the analog signal before digital processing and storage. Designers should verify the analog input range, common-mode limits, master and slave clock modes, data format, and exposed thermal and supply requirements against the complete manufacturer datasheet before layout. Input and output return paths should preserve low-noise behavior, while decoupling and grounding should prevent converter and digital-interface noise from coupling into the analog section. This page consolidates verified distributor specifications, package information, functional application guidance, and same-family replacement candidates. It also identifies the missing pinout, detailed timing, absolute maximum ratings, and verified pricing data that engineers should obtain from the manufacturer datasheet before releasing a production design.

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WM8782SEDS/V - 24-Bit 192kHz Stereo ADC | Cirrus Logic
WM8782SEDS/V

WM8782SEDS/V - 24-Bit 192kHz Stereo ADC | Cirrus Logic

Cirrus Logic WM8782SEDS/V is a 24-bit, 192kHz stereo audio analog-to-digital converter with an I2S digital interface, housed in a 20-pin SSOP package. The converter supports two analog input channels, master or slave clocking, and an integrated front-end op-amp for line-level signals. An audio ADC is a semiconductor that converts left and right analog audio voltages into digital words for processing, storage, transmission, or playback. The WM8782 belongs to the broader hierarchy of audio converter, data-converter, analog-to-digital converter, and integrated-circuit families. Its stereo architecture captures two channels simultaneously, while its digital output can feed an audio processor, codec, digital mixer, or digital recording system. The WM8782SEDS/V provides 24-bit resolution and sampling rates from 8kHz to 192kHz. Its sigma-delta ADC architecture supports 32x, 64x, or 128x oversampling, while the output word length can be configured from 16 to 24 bits. FORMAT and IWL control inputs permit operation in standard audio-interface configurations, reducing the need for external logic or a separate digital interface controller. Master and slave clocking schemes are controlled through the M/S input, allowing the converter to work with external master clocks or generate its own audio clock in master mode. The integrated front-end op-amp accepts analog input signals greater than the nominal line-level range, while the two-channel input structure supports stereo source capture. These features make the converter suitable for compact digital audio equipment that requires high-rate conversion without a large external analog front end. Typical uses include consumer recording equipment, digital mixers, multichannel sound-card inputs, media-capture systems, and industrial audio interfaces. The device is also appropriate for projects requiring 192kHz acquisition when the host processor can accommodate the corresponding data rate. Its 20-pin SSOP package supports conventional surface-mount assembly, although careful grounding and decoupling remain essential for audio performance. During layout, place input, output, and decoupling components according to the pin-description table and recommended application circuit in the manufacturer datasheet. The analog input and digital interface paths require a quiet ground strategy, short return paths, and controlled clock routing. Because this converter performs high-resolution signal acquisition, bypassing, grounding, and supply sequencing can influence channel matching and overall signal integrity. This product page combines the device identity, verified technical attributes, lifecycle information, source links, replacement analysis, and practical design guidance. It helps engineers distinguish exact package compatibility from merely similar ADC functions and plan PCB, interface, and sourcing decisions before committing the WM8782SEDS/V to a design.

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WM8783GED/RV - 24-Bit Stereo Audio ADC | Cirrus Logic
WM8783GED/RV

WM8783GED/RV - 24-Bit Stereo Audio ADC | Cirrus Logic

The Cirrus Logic WM8783GED/RV is a 24-bit stereo audio analog-to-digital converter designed for digital audio systems. It accepts single-ended analog line inputs, supports sampling rates up to 96 kSPS, and provides an I2S digital audio interface. The component is housed in an 8-pin SOIC package. The WM8783 belongs to the audio ADC category within the broader analog-to-digital converter and mixed-signal IC hierarchy. Audio ADCs convert continuous analog audio signals into digital sample streams for processing, storage, transmission, or playback. The WM8783 is intended for applications such as set-top boxes, DVD systems, and other consumer audio equipment where stereo line-level signals must be digitized with a compact interface. Key features include 24-bit resolution, a maximum sampling rate of 96 kSPS, stereo analog inputs, and an I2S output interface. The device is described as a compact, low-cost ADC for set-top box and DVD applications. Its stereo input architecture is suitable for two-channel audio acquisition, while the digital output allows direct connection to a digital audio processor, codec, or system interface. The WM8783GED/RV is manufactured on a CMOS process and is therefore susceptible to electrostatic discharge damage during handling. ESD-safe handling procedures are important during soldering, inspection, and production assembly. The device's function is straightforward for an audio converter: analog signals enter through the stereo input pins, are sampled and quantized by the ADC, and are transferred over the I2S interface as digital audio data. Typical applications include set-top box audio paths, DVD player analog input stages, consumer audio receivers, and embedded multimedia systems. The 96 kSPS maximum rate supports high-resolution audio conversion, while 24-bit data provides substantial dynamic range for line-level sources. System designers should verify the analog input range, reference implementation, clocking requirements, and digital interface configuration against the manufacturer datasheet before finalizing the circuit. This page combines the WM8783GED/RV product identity, core ADC specifications, application guidance, and design considerations into a concise engineering reference. It is intended to help engineers identify suitable use cases, plan board-level integration, and evaluate equivalent parts without overlooking pin compatibility, interface requirements, or supply-availability constraints.

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WM8783GED/V Stereo 98kHz Audio ADC | Cirrus Logic
WM8783GED/V

WM8783GED/V Stereo 98kHz Audio ADC | Cirrus Logic

Cirrus Logic WM8783GED/V is a stereo low-power audio analog-to-digital converter with a 98 kHz sampling rate and 24-bit I2S output, supplied in an 8-pin SOIC package. The verified manufacturer-family source describes it as a stereo low-power ADC, while the retrieved distributor data identifies the same device family for 96 kHz operation. It is designed for compact audio capture, playback, and mixed-signal systems requiring dual-channel conversion. An ADC is an analog-to-digital converter, a mixed-signal integrated circuit that converts continuously varying analog audio voltages into digital samples. In the broader component hierarchy, an audio ADC belongs to data converters, mixed-signal semiconductors, and signal-chain ICs. The WM8783GED/V therefore sits between an analog microphone or line input and a digital audio interface such as I2S. The principal verified features are stereo operation, a 24-bit conversion format, I2S digital output, and a family sampling-rate capability reported as 98 kHz in distributor material and 96 kHz in the Wolfson-family result. The device is identified as low power, making it relevant to embedded audio systems where power consumption, channel count, and board area constrain the architecture. The manufacturer-family datasheet source also indicates that the device is manufactured on a CMOS process and is ESD-sensitive. WM8783GED/V is suitable for digital recording front ends, USB audio adapters, industrial audio capture, portable audio equipment, and consumer audio systems. In each case, the stereo ADC can convert left and right analog inputs into digital samples for downstream processing or transmission. The I2S interface helps simplify connection to digital audio controllers, DSPs, and microcontrollers, although the host device must support the required clocking and framing format. When selecting this part, verify the exact electrical characteristics, analog input range, clock requirements, master or slave operating mode, and package pin assignment in the current manufacturer documentation. Do not infer those values from generic ADC descriptions. For replacement work, confirm that the candidate uses the same SOIC footprint and pin-to-pin signal arrangement rather than relying only on a similar sample rate or converter function. This page combines the verified source snippets for the WM8783GED/V family with engineering-oriented application and selection context. Because the retrieved data does not provide a complete current manufacturer product page, several detailed parameters remain explicitly marked for verification rather than being guessed.

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WM8786GEDS/V - 24-Bit 192kHz Stereo Audio ADC | Cirrus Logic
WM8786GEDS/V

WM8786GEDS/V - 24-Bit 192kHz Stereo Audio ADC | Cirrus Logic

The Cirrus Logic WM8786GEDS/V is a 24-bit, 192kHz stereo audio analog-to-digital converter with differential inputs, digital audio processing, and I2S output in a 20-pin SSOP package. The device is identified by the WM8786GEDS/V manufacturer part number and is intended for high-performance recordable media applications. A stereo audio ADC is a data-conversion IC that accepts two analog audio channels and converts them into digital samples for processing, storage, transmission, or playback. The WM8786GEDS/V belongs to the ADC/DAC and audio data-converter hierarchy, where differential inputs, integrated audio DSP, and a high-resolution serial interface help simplify audio capture designs. Verified distributor and manufacturer information identifies the WM8786GEDS/V as an audio ADC with 24-bit resolution, operation up to 192kHz, DSP capability, differential inputs, and a 20-SSOP package. The stereo architecture supports simultaneous left and right audio conversion, while the digital audio interface is identified as I2S. These features make the device suitable for consumer audio equipment, recording systems, digital audio equipment, and embedded audio products. The WM8786GEDS/V is differentiated from general-purpose data converters by its dedicated audio-oriented feature set. Its 24-bit resolution supports high-fidelity capture, the 192kHz maximum sample rate supports high-resolution audio, and differential analog inputs help reduce common-mode noise in balanced audio signal paths. The integrated DSP function can assist with signal conditioning and audio processing, although the exact operating modes and filter settings must be confirmed in the manufacturer datasheet. Typical applications include stereo recording equipment, consumer audio systems, digital mixing and amplification products, USB or portable audio interfaces, and other systems requiring two-channel audio capture. In these applications, the ADC can be placed between balanced or appropriately conditioned analog audio inputs and an I2S-capable digital audio processor. The 20-SSOP package supports compact PCB layouts, but its fine pitch requires careful soldering and layout practices. Designers should confirm the analog input range, differential input configuration, reference-voltage requirements, digital supply levels, clocking requirements, and supported I2S formats before releasing a production design. Decoupling capacitors should be placed close to the supply pins, and analog and digital routing should be separated to reduce switching noise coupling into the audio inputs. The manufacturer datasheet and application information should be used for the final input, clock, filtering, and layout implementation. This product page consolidates verified distributor identity and product descriptions with package, application, selection, and engineering guidance. It distinguishes the WM8786GEDS/V from the related WM8786GEDS/RV ordering variant and provides a practical framework for confirming pin and PCB compatibility before substitution.

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WM8788GEDT - 24-Bit 192kHz Stereo Audio ADC | Cirrus Logic
WM8788GEDT

WM8788GEDT - 24-Bit 192kHz Stereo Audio ADC | Cirrus Logic

The Cirrus Logic WM8788GEDT is a 24-bit stereo audio analog-to-digital converter capable of sampling at up to 192 kHz, supplied in a 16-pin TSSOP package. It supports I2S digital audio output, analog and digital supply rails, and analog line-level inputs configured through external resistors. The verified operating-temperature range is -40°C to +85°C, and the component is available in reel packaging for surface-mount production. An audio ADC is an interface IC that converts left- and right-channel analog sound signals into digital samples for processing, storage, or transmission. The WM8788GEDT belongs to the broader ADC/DAC hierarchy, where an ADC converts analog audio into digital data and a DAC performs the inverse operation. Its stereo architecture supports simultaneous processing of two analog channels, while the digital interface carries 24-bit audio data. The headline specifications are a 24-bit conversion resolution, a maximum sample rate of 192 kHz, and a 16-pin TSSOP package. The device accepts a pair of analog inputs, and external resistors configure the inputs for line-level operation at 1 Vrms or for higher signal levels. This combination makes the converter appropriate for consumer audio equipment, digital mixing systems, recording interfaces, and other stereo audio products that require high-resolution capture. The verified interface data identifies I2S as the digital audio interface and indicates separate analog and digital supply sources. These supply domains require correct decoupling and grounding to prevent digital switching activity from contaminating the analog conversion path. The converter's operating range of -40°C to +85°C supports use across industrial and commercial temperature environments, subject to the complete manufacturer datasheet requirements. Typical applications include high-resolution stereo recording, line-level audio capture, digital audio mixers, and audio interface products. Its 192 kHz maximum rate supports high-resolution conversion, while the 24-bit word length provides ample numerical resolution for professional and premium consumer audio. Designers should still verify clocking, supported audio-data formats, analog input scaling, and power sequencing against the manufacturer datasheet before releasing a PCB. A key design consideration is analog-versus-digital layout isolation. Place the analog input network close to the converter, maintain a continuous ground reference, and isolate high-current digital return paths from the ADC inputs. Also confirm the exact 16-pin TSSOP pinout and exposed support requirements; the supplied search data does not include a verified pin-by-pin diagram. This page combines verified manufacturer and distributor information with explicit data gaps, application guidance, sourcing context, and design considerations. It distinguishes documented facts from parameters that still require confirmation in the full WM8788GEDT datasheet, helping engineers make a more reliable preliminary design decision without presenting unsupported specifications as established data.

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WM8788GEDT/R - 24-Bit Stereo ADC | Cirrus Logic
WM8788GEDT/R

WM8788GEDT/R - 24-Bit Stereo ADC | Cirrus Logic

Cirrus Logic WM8788GEDT/R is a high-performance 24-bit stereo analog-to-digital converter designed for consumer audio equipment. It converts two analog input channels into 24-bit digital audio data at up to 192 kHz through an I2S digital interface, and is packaged in a 16-pin TSSOP surface-mount package. The WM8788GEDT/R designation identifies the reel-packaged version of this Wolfson Microelectronics audio converter. An ADC is a data-acquisition and signal-conversion IC that transforms continuously varying analog voltages into digital values for processing or transmission. In the audio hierarchy, the WM8788GEDT/R belongs to the high-performance stereo ADC class, combines an analog signal chain with digital data conversion, and ultimately operates as a mixed-signal semiconductor. Its stereo architecture makes it suitable for systems requiring simultaneous conversion of left and right audio channels. The primary features are 24-bit resolution, a maximum conversion rate of 192 kHz, two analog inputs, and an I2S digital audio output. External resistors configure the analog inputs for a 1 Vrms line-level signal or for higher input levels. This allows the same converter to be used in different source-impedance and signal-amplitude conditions when the board-level resistor network is selected appropriately. The device supports separate analog and digital supply domains, providing flexible rail partitioning when analog and digital subsystems require different voltage levels. Its 16-TSSOP package supports compact, surface-mount PCB construction, while the listed operating-temperature range of -40°C to +85°C covers industrial-temperature commercial equipment. The manufacturer lists the part as active. Typical applications include LCD television audio paths, DVD players, Blu-ray Disc equipment, set-top boxes, and other consumer systems that convert stereo analog audio into a digital format. Its 192 kHz capability also supports high-resolution audio conversion where the source, clocking, and downstream signal chain support the corresponding sample rate. Designers should treat the analog input network, supply sequencing, clocking, and digital-interface implementation as one signal-chain design. Place input and supply decoupling close to the device, keep analog and digital return currents separated, and verify every digital-audio timing condition against the manufacturer datasheet before releasing the PCB. This page combines the product specifications, sourcing guidance, practical application guidance, package information, and a verified comparison of related audio-conversion options. It is intended to help engineers select the correct converter and plan a reliable implementation without overlooking package, interface, or analog-front-end constraints.

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WM8952ECS/RV - 24-Bit Mono Audio ADC | Cirrus Logic
WM8952ECS/RV

WM8952ECS/RV - 24-Bit Mono Audio ADC | Cirrus Logic

The Cirrus Logic WM8952ECS/RV is a 24-bit mono audio analog-to-digital converter with an integrated microphone preamplifier, digital signal processing, and an I2S audio interface. It supports sampling rates from 8 kS/s to 48 kS/s and is housed in a compact 28-W-CSP measuring 2.59 mm by 2.50 mm. The device operates from a 1.71 V to 3.6 V supply and is intended for space-constrained audio capture and voice-recording systems. An audio ADC is a mixed-signal semiconductor that converts an analog microphone or line-level waveform into a digital audio stream. The WM8952ECS/RV belongs to the audio ADC hierarchy, combining an analog-to-digital converter, programmable gain stage, microphone preamplifier, and digital filters into one package. This integration reduces the number of discrete signal-conditioning components required near a microphone capsule or audio input while preserving a standard digital interface for downstream processing. The converter provides 24-bit resolution and supports sampling rates extending to 48 kS/s. Its signal path includes a selectable high-pass filter and four fully programmable notch filters. A mixed-signal automatic level control function with noise gate helps maintain usable recording levels, and the PGA gain can be read back while ALC operation is active. These features are useful in microphone arrays, voice-capture products, and compact consumer audio equipment where environmental noise and changing source levels require active signal conditioning. The digital audio interface supports I2S as well as A-law and μ-law formats. I2S provides a framed, clocked connection to a digital audio processor, host controller, or audio codec, while the companded formats support legacy telephony and voice applications. The manufacturer datasheet describes the device as using an advanced sigma-delta converter design to provide high-quality audio across its 8 kS/s to 48 kS/s operating range. Typical uses include digital voice recorders, headset electronics, mobile audio accessories, microphone preamp modules, and compact industrial monitoring equipment. Its 28-W-CSP footprint is particularly useful when board area is restricted, although careful escape routing and stable analog supply design remain essential because the device combines sensitive analog input circuitry with a high-speed digital interface. Designers should treat the microphone input, digital clock lines, and supply connections as separate critical paths. Keep analog traces short, use a clean low-noise supply, and follow the manufacturer’s recommended application circuit and component values. The 1.71 V to 3.6 V operating range also requires the host system to remain compatible with the converter’s supply and I2S logic levels. This product page combines the manufacturer specifications, verified distributor listings, package information, application guidance, and replacement analysis for engineers evaluating the WM8952ECS/RV. It also distinguishes documented device functions from specifications that require confirmation from the full datasheet, helping designers plan microphone-front-end integration, interface compatibility, and board-level sourcing.

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WM8953ECS/RV - 24-Bit Stereo ADC with PLL | Cirrus Logic
WM8953ECS/RV

WM8953ECS/RV - 24-Bit Stereo ADC with PLL | Cirrus Logic

The Cirrus Logic, Inc. WM8953ECS/RV is a low-power stereo analog-to-digital converter with a 24-bit sigma-delta audio ADC, support for 48 kHz sampling, an integrated PLL, and digital I2S or TDM interfaces. It is packaged in a 42-WLCSP and is designed for portable audio systems, mobile handsets, microphone capture, and line-level stereo recording. Four single-ended or differential analog input connections provide flexible source selection, while each input path supports programmable analog gain up to 60 dB. An audio ADC is a data-conversion IC that converts left and right analog audio signals into digital words for processing, storage, transmission, or playback. The WM8953ECS/RV belongs to the broader ADC/DAC and signal-conversion hierarchy, combining a stereo sigma-delta conversion stage, analog input conditioning, clock generation, and a serial digital audio interface in one compact component. This integration reduces the number of separate clock, capture, and routing blocks required in portable equipment. Key features include 24-bit stereo conversion, operation at 48 kHz, four analog input connections, up to 60 dB of analog gain per input path, and a programmable high-pass filter in the ADC signal path. Single-ended or differential input configurations support microphone and line-input architectures. The integrated PLL and choice of I2S or TDM digital interfaces make the device suitable for systems that need predictable audio-clock recovery and flexible connection to application processors or digital audio processors. The sigma-delta ADC architecture prioritizes high-resolution audio conversion while supporting low-power portable-system requirements. Programmable input gain lets the signal chain be adjusted before conversion, while the high-pass filter can help reduce unwanted low-frequency content in voice and microphone recordings. The WLCSP format supports compact PCB layouts, although careful escape routing, exposed-pad thermal management, and clean analog grounding are essential. Typical uses include mobile-handset voice capture, digital voice recorders, headset microphones, portable audio accessories, stereo line-input equipment, and compact consumer devices that accept digital audio from the WM8953ECS/RV. The same integrated conversion and clocking architecture also suits industrial monitoring modules when power consumption, package area, and audio input count are important constraints. Design the analog input network for the intended source impedance and signal amplitude. Keep microphone and line-input traces short, isolate them from switching nodes, place filtering capacitors close to their associated pins, and maintain a continuous ground reference beneath the analog section. The compact 42-WLCSP requires careful assembly planning because its fine-pitch land pattern and exposed thermal area demand accurate stencil, paste, and reflow control. This product page combines the WM8953ECS/RV device identity, interface and conversion details, application guidance, design considerations, sourcing options, and verified manufacturer information to support engineering selection and PCB planning.

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WM8955LSEFL - Stereo Audio DAC with Speaker Driver | Cirrus Logic
WM8955LSEFL

WM8955LSEFL - Stereo Audio DAC with Speaker Driver | Cirrus Logic

The Cirrus Logic Inc. WM8955LSEFL is a stereo digital-to-analog converter with an integrated headphone and speaker driver, a digital audio PLL, and DSP processing for portable audio products. It operates from a 1.71 V to 3.6 V supply, supports 24-bit conversion, and is offered in a compact 32-QFN 5 x 5 mm package. Cirrus Logic markets the device for portable audio applications where several audio functions must share a small circuit area. An audio DAC is a mixed-signal integrated circuit that converts digital audio samples into analog voltage signals for amplifiers, headphones, or loudspeakers. Within the broader signal-chain hierarchy, the WM8955LSEFL combines a digital-to-analog converter, digital signal processing, clock generation, and output-driver functions. Integrating these blocks reduces the component count and board area required around a portable device's audio output stage. Key device attributes include two output channels, 24-bit resolution, and a 48 kSPS audio sampling rate listed for the WM8955LSEFL. The manufacturer also identifies DSP and I2S interfaces, along with separate analog and digital supply domains. A related WM8955LSEFL/R variant is described as supporting a 96 kSPS sampling rate, demonstrating the family's capability for higher-rate digital audio transmission. The integrated digital processing and PLL allow the converter to derive the required audio clock from a system reference and support multiple serial audio formats. The manufacturer lists DSP and I2S as the principal data interfaces, making the device suitable for application processors and portable audio hosts that provide digital sample streams. Its low-voltage operation suits battery-powered equipment where analog and digital rails commonly sit between 1.8 V and 3.3 V. Typical uses include portable media players, smartphones, tablets, digital audio accessories, and compact consumer products. The WM8955LSEFL can also serve as the output stage in a portable speaker system, reducing the need for separate analog codec and output-amplifier blocks. System designers should confirm the selected host interface, required sampling rate, output configuration, and load impedance against the manufacturer datasheet before releasing a PCB. A key design consideration is the relationship between supply voltage, output drive, and thermal dissipation. Headphone and speaker outputs dissipate power as voltage drop across the output transistors, so sustained high-level playback can raise junction temperature even though the digital interface consumes comparatively little power. Reserve copper around the exposed pad, follow the manufacturer's layout guidance, and place output protection components where they cannot compromise the intended load drive. This page consolidates device specifications, interface details, application guidance, and component-selection considerations for engineers evaluating the WM8955LSEFL in compact audio systems.

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WM9081GICN/V - 24-Bit Mono DAC with 2.6W Amplifier | Cirrus Logic
WM9081GICN/V

WM9081GICN/V - 24-Bit Mono DAC with 2.6W Amplifier | Cirrus Logic

The Cirrus Logic WM9081GICN/V is a mono 24-bit digital-to-analog converter with an integrated 2.6 W Class AB/Class D speaker amplifier, supplied in a 28-pin QFN package measuring 4 x 4 mm. It accepts I2S, DSP, LJ, and RJ digital audio data and is intended for space-constrained portable equipment where a single device must provide high-resolution digital-to-analog conversion and speaker drive. The operating voltage range is 1.71 V to 3.6 V, and the specified temperature range is -40 °C to +85 °C. An audio DAC converts digital audio samples into an analog voltage signal suitable for an audio amplifier or speaker driver. The WM9081GICN/V combines that conversion function with a programmable output stage and integrated mobile parametric equalization. Its fully programmable EQ coefficients allow speaker and enclosure characteristics to be optimized, while programmable dynamic-range control supports louder playback at low listening levels. The result is a compact audio signal-chain component that reduces the need for separate DAC and speaker-driver packages. The device supports 2-wire, 3-wire, 4-wire, and hardware control modes, with digital audio formats including LJ, RJ, I2S, and DSP. TDM support broadens its usefulness in multi-channel portable audio systems where several codec or converter functions share one digital bus. A thermal-shutdown interrupt provides a system-level indication that the integrated output stage has entered its protected operating condition. The manufacturer also identifies programmable gain as part of the device feature set. Typical applications include portable media players, mobile phones, compact personal audio systems, docking speakers, and other battery-powered products with an integrated single-speaker output. Placing the DAC and amplifier in one package reduces board area, external component count, and the number of signal connections between the digital audio source and the speaker. Design layouts should follow the manufacturer datasheet for decoupling, exposed-pad grounding, and analog output routing. Keep the digital interface traces away from the speaker output and amplifier supply nodes to reduce the chance of switching-edge coupling into the audio path. Confirm the configured control mode and digital format in firmware before enabling the output stage. This page organizes the WM9081GICN/V specifications, application guidance, package details, and sourcing information into a single engineering reference for compact mono audio output designs.

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X9313UST1 - 50kΩ 32-Tap Digital Potentiometer SOIC-8 | Renesas
X9313UST1

X9313UST1 - 50kΩ 32-Tap Digital Potentiometer SOIC-8 | Renesas

The Renesas X9313UST1 is a digitally controlled potentiometer (XDCP™) housed in an 8-pin SOIC package with a fixed end-to-end resistance of 50 kΩ and 32 resistive taps. It provides a single-channel, non-volatile, up/down wiper interface through three logic input pins (U/D, INC, CS) and stores the last wiper position through on-chip nonvolatile memory that retains setting across power cycles. The 32-tap resolution gives approximately 1.0% per-step resolution across the resistor array. Background context: a digital potentiometer (often abbreviated "digi-pot") is a solid-state, semiconductor replacement for a mechanical potentiometer or trim pot. Digi-pots sit within the broader data-acquisition and analog-signal-conditioning hierarchy, alongside DACs and digital rheostats, and they belong to the Renesas XDCP™ family. Unlike mechanical pots, they are programmable by host firmware, never wear from mechanical actuation, and ship in surface-mount packages suitable for reflow soldering and dense PCB layouts. Key features include a low 1 mA (typical) standby current, terminal voltages up to ±5 V across the resistor array, a 1.0% end-to-end resistance tolerance, and a wiper current rating up to approximately ±1 mA continuous, with peak surge handling to 10 mA. The 3-wire serial interface consumes only three MCU GPIO pins and is compatible with 5 V logic. The internal architecture pairs a polysilicon resistor array with CMOS wiper switches and a non-volatile memory cell that latches the last wiper position before power-down. Three control inputs (CS, INC, U/D) implement a step-and-direction interface: CS enables the chip, INC clocks each tap step, and U/D selects up or down direction. Power-on recall places the wiper on the stored value with deterministic behavior. Typical applications are audio volume/balance control, LCD contrast/brightness trimming, programmable voltage references, sensor calibration, and parameter-set storage where an MCU must hold a setting through power-down. Because the wiper retains state without external EEPROM, designers can eliminate a serial EEPROM and reduce BOM cost in many calibration circuits. When designing with the X9313UST1, respect the maximum terminal voltage (±5 V across the resistor terminals) and verify that pin 8 is correctly identified in PCB layout - the part is widely second-sourced and a small number of look-alike 8-pin digi-pots swap the GND and VL pin positions. Add a 0.1 µF decoupling capacitor close to the supply pin and confirm that CS is not allowed to float. This page combines the Renesas datasheet specifications, current distributor pricing, pin-compatible cross references, and practical layout notes not always covered in the original datasheet, providing engineers a single-page engineering brief for the X9313UST1.

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XR4151CP-F - V/F Converter, 8-22V, 100kHz | MaxLinear
XR4151CP-F

XR4151CP-F - V/F Converter, 8-22V, 100kHz | MaxLinear

The MaxLinear XR4151CP-F is a monolithic voltage-to-frequency (V/F) and frequency-to-voltage (F/V) converter IC supplied in an 8-pin PDIP through-hole package. It accepts a single-ended analog input voltage of 0 to 10 V (or -10 V to 0 V with appropriate biasing) and produces a proportional output pulse train whose frequency is linearly related to the input amplitude. The maximum full-scale frequency is 100 kHz with a usable range of 1 Hz to 100 kHz and a typical linearity error of +/-0.05%. A voltage-to-frequency converter (V/F or VFC) is a mixed-signal building block that translates a continuous analog voltage into a stream of digital pulses whose repetition rate is precisely proportional to the input magnitude. VFCs sit within the broader hierarchy of analog-to-digital conversion techniques alongside successive-approximation ADCs, dual-slope integrating ADCs, and sigma-delta modulators, and are valued for their inherent monotonicity, excellent noise rejection, and galvanic isolation-friendly pulse output that can be transmitted through optocouplers or long cables. Key features of the XR4151CP-F include a supply voltage range of 8 V to 22 V, very high noise rejection, inherent monotonicity over the full dynamic range, a single open-collector output stage that can interface with CMOS/TTL logic, and the ability to operate in reverse as a frequency-to-voltage converter with a small number of external components. The -F suffix denotes the lead-free, RoHS-compliant version of the original XR4151CP, while both share the same die and pinout. The internal architecture consists of a precision current source, a high-gain operational amplifier, a comparator, and a one-shot timing network. The op-amp drives a current into an external RC network whose charging time determines output pulse width; this architecture eliminates the missing-pulse and non-monotonic errors that plague simple charge-pump VFCs. The dedicated low-leakage input protection on pin 7 prevents the inverting input from being driven below ground, eliminating the need for an external clamp diode in most applications. Typical applications include precision analog-to-digital conversion where the output is fed to a counter or microcontroller capture input, isolated analog signal transmission across 4-20 mA replacement links, motor speed control via frequency-to-voltage conversion of tachometer pulses, and long-integral analog signal conditioning in industrial weighing, temperature, and pressure transmitters. When designing with the XR4151CP-F, choose the external timing resistor and capacitor first - the resistor sets the input current range and full-scale frequency, while the capacitor sets the one-shot pulse width. Add a 0.01 uF bypass capacitor close to the supply pin and use low-leakage timing components to maintain the 0.05% linearity specification. This page synthesizes distributor pricing, lead-time, pin-compatible alternatives, and practical design notes not found in the manufacturer datasheet, giving engineers a single-source decision framework for new designs and legacy XR4151CP replacement.

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XRD8775AID-F - 8-Bit 20MSPS Flash ADC, 5V CMOS | MaxLinear
XRD8775AID-F

XRD8775AID-F - 8-Bit 20MSPS Flash ADC, 5V CMOS | MaxLinear

The MaxLinear (formerly Exar) XRD8775AID-F is an 8-bit, 20 MSPS analog-to-digital converter using a 2-step flash architecture in a 20-pin SOIC wide-body package. It operates from a single 5V supply, accepts analog inputs from 0V to VDD, supports a reference range of 1V to VDD, and integrates an internal sample-and-hold function that eliminates the need for an external track-and-hold amplifier. Typical power consumption is 75 mW (excluding reference current), enabling low-power system designs. An analog-to-digital converter (ADC) is a data converter that translates real-world continuous analog signals into discrete digital codes for processing by microcontrollers, FPGAs, or DSPs. Flash and 2-step flash ADCs achieve the highest sampling rates among all ADC architectures by using parallel comparator banks, making them well-suited for video, instrumentation, and high-speed control loops. The XRD8775AID-F belongs to the hierarchy: ADC -> data converter -> signal chain IC -> mixed-signal semiconductor. Key specifications include 8-bit resolution, 20 MSPS sampling rate, parallel digital interface, single 5V analog supply, internal S/H, 0V-to-VDD analog input range, and -40C to +85C operating temperature. The wide-body 20-SOIC package (0.295 inch / 7.50 mm width) provides robust thermal performance and ease of hand-soldering for prototyping. The part is offered in tube packaging for manufacturing. The 2-step flash architecture trades a small number of comparator channels for a substantial reduction in die area and power consumption versus a full flash design, while still maintaining video-grade 20 MSPS throughput. Internal S/H bandwidth supports IF undersampling and video bandwidth applications. The CMOS process ensures low power, latch-up free operation, and stable performance across the industrial temperature range. Typical applications include video digitisation, CCD camera front ends, digital oscilloscopes, ultrasound front-end preprocessing, IF sampling in communications receivers, and industrial process control loops. The combination of wide analog input range and integrated S/H simplifies board-level design for low-channel-count high-speed data acquisition. When designing with this part, place a 0.1 uF ceramic decoupling capacitor as close as possible to the VDD pin and a bulk tantalum or electrolytic capacitor on the analog supply rail. The reference pin requires a low-impedance source; use an op-amp buffer or a dedicated reference IC if the application demands better than 8-bit absolute accuracy. This page synthesises distributor pricing, parametric drop-in alternatives from same-brand and cross-brand portfolios, and practical design notes that complement but do not duplicate the manufacturer datasheet.

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XRD8775AIU - 8-Bit 20MSPS Flash ADC, 20-SSOP | MaxLinear
XRD8775AIU

XRD8775AIU - 8-Bit 20MSPS Flash ADC, 20-SSOP | MaxLinear

The MaxLinear (formerly Exar) XRD8775AIU is a monolithic CMOS 8-bit flash analog-to-digital converter delivering up to 20 MHz sampling rate in a 20-pin SSOP package. It integrates an internal sample-and-hold amplifier, operates from a single +5 V supply, and consumes only 75 mW typical (excluding external reference current). The input voltage range spans 0 V to VDD with a flexible reference voltage range of 1 V to VDD, allowing direct interface with single-supply analog signal chains. An 8-bit flash ADC is a parallel-architecture converter that uses 2^N-1 comparators to digitize an analog input in a single clock cycle, delivering the fastest conversion latency of any ADC topology at the cost of exponential die-area growth with resolution. Flash converters therefore dominate sub-10-bit, multi-MHz applications such as video digitizers, digital oscilloscope front ends, and radar IF samplers where latency and sampling rate, not resolution, are the primary constraints. Key specifications of the XRD8775AIU include 8-bit resolution, 20 MSPS maximum sampling rate, internal S/H, single +5 V supply operation, 75 mW typical power dissipation, latch-up-free CMOS construction, and 2000 V minimum ESD protection. The parallel data interface simplifies connection to FPGAs, ASICs, or microcontrollers without requiring a serial programming sequence. The 20-SSOP package suits space-constrained boards where analog and digital grounds can be partitioned for noise immunity. Architecturally, the device uses 255 parallel latched comparators feeding a priority encoder that generates an 8-bit thermometric code, then a binary encoder delivers the output word in a single clock edge. The internal sample-and-hold amplifier stabilizes the input within the aperture window, which is critical for full-scale inputs above 10 MHz to avoid code-edge distortion. The reference ladder is externally driven, giving the designer freedom to set the LSB size by scaling VREF between 1 V and VDD. Typical applications include digital oscilloscope input channels, video digitizers, CCD imaging front ends, radar IF sampling, ultrasound beamforming pre-processors, and industrial data-acquisition front ends. The 75 mW dissipation also suits portable test gear and battery-powered instrumentation where the internal S/H eliminates an external track-and-hold IC. Design tip: Place a 0.1 uF ceramic decoupling capacitor within 5 mm of the VDD pin and a bulk 10 uF tantalum capacitor near the analog ground island; route the 8-bit parallel bus with matched trace lengths to prevent sub-LSB timing skew at the full 20 MSPS rate. Also bypass the external VREF pin with 10 uF to keep the internal resistor ladder stable and reduce sparkle-code errors. This page synthesizes distributor pricing, verified drop-in 8-bit flash ADC alternatives, and practical PCB layout guidance that goes beyond the manufacturer datasheet, helping engineers shorten the BOM-sourcing and design-in cycle for this legacy flash converter.

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XRD8775AIU-F - 8-Bit 20MSPS Parallel ADC | MaxLinear | Exar
XRD8775AIU-F

XRD8775AIU-F - 8-Bit 20MSPS Parallel ADC | MaxLinear | Exar

The MaxLinear XRD8775AIU-F is an 8-bit resolution, 20MSPS sampling rate analog-to-digital converter (ADC) with a single-ended input and parallel digital data interface, housed in a 20-pin SSOP package. Originally introduced by Exar Corporation and now sold under MaxLinear, the part is specified as IC ADC 8BIT PAR 20MSPS 20SSOP and operates from a single 5V analog supply. An analog-to-digital converter (ADC) is a data-acquisition integrated circuit that samples continuous analog signals and converts them into discrete digital codes. Flash ADCs like the XRD8775AIU-F use an array of comparators to deliver the fastest conversion times, typically reserved for video, instrumentation, and high-speed control loops where sub-microsecond conversion latency is mandatory. The 8-bit, 20MSPS segment sits at the entry level of high-speed conversion and is well suited for digitizing video bandwidths, IF signals, and oversampled measurement channels. Key features per the manufacturer datasheet include 8-bit resolution, 20 MHz maximum sampling rate, an internal sample-and-hold (S/H) function, a single-ended analog input range of 0V to VDD, a reference input range of 1V to VDD, and typical power consumption of 75 mW (excluding reference current). The device provides latch-up free operation and ESD protection rated at 2000V minimum, simplifying board-level robustness. The XRD8775AIU-F uses a flash converter architecture with a 1:1 S/H-to-ADC ratio, providing a single simultaneous sampling channel with a parallel 8-bit output bus. This architecture removes the need for an external track-and-hold amplifier in most digitizer front ends and simplifies downstream FPGA or ASIC capture logic. Typical applications include standard-definition video digitizers, CCD/camera signal chains, ultrasound front-end signal conditioning, IF sampling for communications receivers, and high-speed industrial inspection systems. The 20MSPS capability comfortably handles component video and baseband IF signals up to about 7 MHz of input bandwidth. When designing with this part, ensure the analog input drive network presents low source impedance at the Nyquist frequency and that the reference pin is decoupled with a low-ESR capacitor placed within 5 mm of the package pin. Because the part is sourced via MaxLinear (after the Exar acquisition) and is listed as obsolete in some distributor databases, confirm long-term supply before committing to high-volume production.

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XRD8785AID-F - 8-Bit 20MHz Flash ADC, 24-SOIC | MaxLinear
XRD8785AID-F

XRD8785AID-F - 8-Bit 20MHz Flash ADC, 24-SOIC | MaxLinear

The MaxLinear (formerly Exar) XRD8785AID-F is an 8-bit, 20 MSPS flash analog-to-digital converter (ADC) with one input channel, housed in a 24-pin SOIC wide-body package. It uses an advanced 5V CMOS process and provides 8-bit resolution, up to 20 MHz sampling rate, an internal sample-and-hold function, and a single 5V analog supply. The device accepts an input range of 0V to VDD and a reference range of 1V to VDD, making it suitable for general-purpose digitizing of unipolar signals. Latch-up free operation and a minimum 2 kV ESD protection rating ensure robust real-world handling during board assembly and field use. An 8-bit flash ADC is the fastest ADC architecture, using 2^8 (256) parallel comparator-latch cells and a resistor reference ladder to convert an input voltage to a digital code in a single clock cycle. Flash ADCs occupy the low-resolution, very-high-speed corner of the converter family tree: SAR ADCs (successive approximation) offer higher resolution at lower speed, while pipelined ADCs sit between them. Flash ADCs therefore dominate in digital oscilloscopes, video digitizers, CCD imaging front-ends, radar IF sampling, and digital receiver IF strips where sub-100 ns latency matters more than 12-16 bit precision. Key features of the XRD8785AID-F include 5V single-supply operation, a typical power dissipation of 75 mW excluding the reference current, an internal S/H that removes the need for an external track-and-hold amplifier, and three-state CMOS-compatible digital outputs. Its flash topology delivers full-code conversion in a single clock, and the 24-SOIC package exposes all digital outputs and the S/H control pins for easy parallel interfacing to FPGAs, microcontrollers, or display controllers. Typical applications for the XRD8785AID-F include digital oscilloscope front-ends, video digitizers, CCD imaging signal chains, instrumentation digitizers, and communication IF sampling. The simple 5V/CMOS interface, parallel output bus, and low 75 mW dissipation also suit it for board-level prototyping where a fast acquisition path is needed without the cost of a precision ADC. When designing with this device, follow the datasheet's recommended decoupling and reference bypassing carefully. Place a 0.1 uF ceramic bypass close to the analog supply pin and a 10 uF bulk tantalum or ceramic capacitor nearby; bypass the reference pin with a low-impedance capacitor so the high-speed comparator ladder does not see reference bounce. For engineers evaluating the XRD8785AID-F, DigiKey, Mouser, and Octopart list it as an active MaxLinear SKU with multiple distributor stocks, while legacy Exar datasheet PDFs remain valid references. This page goes beyond the basic datasheet by consolidating distributor pricing tiers, cross-brand drop-in alternatives, and practical PCB/thermal layout notes.

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XRD8785AIDTR-F - 8-Bit 20MSPS Flash ADC, 24-SOIC | MaxLinear
XRD8785AIDTR-F

XRD8785AIDTR-F - 8-Bit 20MSPS Flash ADC, 24-SOIC | MaxLinear

The MaxLinear XRD8785AIDTR-F is an 8-bit flash analog-to-digital converter (ADC) sampling at up to 20 MSPS with a single 5V supply, housed in a 24-pin wide-body SOIC package (0.295 inch / 7.50 mm body width) shipped on tape and reel. Key electrical parameters include 8-bit resolution, 20 MHz maximum sampling rate, one single-ended analog input, internal sample-and-hold (S/H), external or internal reference option, 0V-to-VDD analog input range, 1V-to-VDD reference range, 75 mW typical power consumption (excluding reference), and an operating temperature range of -40C to +85C. The suffix "D" indicates the 24-SOIC package, "T" indicates tape-and-reel packaging, and "R-F" denotes the MaxLinear / Exar part-numbering convention. A flash ADC is a type of analog-to-digital converter that uses a parallel bank of 2^n comparators to convert an analog signal to an n-bit digital code in a single clock cycle, achieving the highest sampling speed of any ADC architecture. The hierarchy is: ADC -> data converter -> data acquisition IC -> mixed-signal IC -> semiconductor. Flash converters excel in applications demanding low latency and wide input bandwidth, but they trade resolution and power efficiency against sampling speed. The XRD8785AIDTR-F occupies the entry-level 8-bit, 20 MSPS tier, which is the typical sweet spot for video digitisation, ultrasound receive beams, and intermediate-frequency (IF) sampling in low-cost communications receivers. Key features of this device include a parallel (TTL-compatible) digital output bus, internal S/H front-end, latch-up free CMOS construction, ESD protection on analog and digital pins, single 5V supply operation, and low power consumption at 75 mW typical. The 24-SOIC wide-body package measures approximately 15.4 mm x 7.5 mm x 2.35 mm, providing generous die-to-board clearance for through-hole or socketed prototypes. The device is built on a 5V CMOS process, providing low power consumption, latch-up immunity, and ESD protection. Internal reference mode simplifies bill-of-materials, while external reference mode lets designers optimise linearity or temperature drift for instrumentation-grade designs. Typical applications include video digitisation, digital oscilloscope front-ends, IF sampling in communications receivers, CCD/CMOS image sensor digitisation, and industrial control loop sampling. When designing with this device, ensure the analog input signal is bandwidth-limited to less than the Nyquist frequency (10 MHz for 20 MSPS) and that the external reference decoupling capacitor is placed within 5 mm of the REF pin to prevent kickback noise from corrupting the conversion. This page synthesises distributor stock, lifecycle risk, drop-in ADC alternatives, and practical design notes not found in the manufacturer datasheet.

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