I/O Expanders
Products (2)
PCAL9714HN/Q900 - 14-bit SPI I/O Expander AEC-Q100 | NXP
The NXP Semiconductors PCAL9714HN/Q900 is a 14-bit ultra low-voltage level-translating SPI I/O expander with Agile I/O features, interrupt output, and reset, qualified to AEC-Q100 for automotive applications and housed in a 24-pin HVQFN (4x4 mm) package. It expands a microcontroller's GPIO count over a Serial Peripheral Interface running up to 5 MHz, with an interface that operates down to 1.1 V. An I/O expander is a peripheral IC that gives a host microcontroller additional general-purpose input/output pins over a serial bus such as SPI or I2C. In the system hierarchy, an I/O expander sits between the microcontroller (the host) and the end loads - switches, LEDs, sensors, or other digital devices - and belongs to the broader family of interface ICs used for remote I/O expansion in embedded systems. Key features include the 14 independently configurable GPIO pins, an ultra low-voltage SPI interface that translates directly from cores operating down to 1.1 V, and NXP's Agile I/O feature set, which provides configurable output drive strength, latch-up-free power-up, and programmable pull-up/pull-down behavior. The dedicated interrupt output (INT) signals the host when an input changes state, and the active reset (RESET) pin restores the register map to default conditions without a power cycle. Technically, the PCAL9714 performs internal level translation between the low-voltage SPI interface side and the wider I/O supply, allowing a 1.1 V to 1.8 V microcontroller to safely drive I/O powered at higher voltages. The SPI clock supports up to 5 MHz, and the HVQFN24 package (4 x 4 x 0.85 mm body, plastic thermal enhanced very thin quad flat, no leads) suits space-constrained automotive and industrial boards. Typical applications include automotive body control modules and door-zone electronics, keypad and switch matrix scanning, LED and indicator control, and fan or sensor status monitoring in industrial controllers. The AEC-Q100 qualification makes it especially appropriate for automotive tiers where reliability over temperature is mandatory. Design consideration: keep the SPI traces short and decouple the VDD pins with 100 nF ceramics close to the package; the ultra low-voltage interface tolerates little noise margin, so signal integrity planning matters more than with 3.3 V parts. This page synthesizes distributor listings, AEC-Q100 qualification details, drop-in family variants, and practical design notes not found in the manufacturer datasheet alone. Pricing shown is as of 2026-10-19 where available.
PCAL9722HN/Q900 - 22-bit SPI I/O Expander AEC-Q100 | NXP
The NXP PCAL9722HN/Q900 is an ultra-low-voltage translating 22-bit SPI I/O expander with Agile I/O features, interrupt output and reset, supplied in a 32-pin HVQFN (5x5 mm) package and qualified to AEC-Q100 for automotive applications. It communicates over a 5 MHz SPI bus and supports a supply voltage range of 1.1 V to 5.5 V on the SPI bus side, enabling bidirectional voltage-level translation and GPIO expansion between 1.1 V and 5.5 V domains. An I/O expander is a peripheral IC that adds general-purpose input/output pins to a microcontroller (MCU) or microprocessor (MPU) over a serial interface, extending pin count without upgrading to a larger device. In the power-management and interface hierarchy, I/O expanders sit in the system I/O subsystem alongside GPIO controllers, port expanders and level translators. The PCAL9722 is unusual in combining both functions: expansion and translation. Key features include 22 configurable GPIO channels, a 5 MHz SPI interface, ultra-low-voltage operation down to 1.1 V for direct connection to advanced low-core-voltage MCUs, Agile I/O functions such as configurable output drive strength and latchable inputs, a dedicated interrupt output, and an external reset input for deterministic power-up states. Technically, the PCAL9722 uses a dual-supply translating architecture: the SPI side operates from 1.1 V to 5.5 V while the I/O side supports a separate port supply, allowing safe interfacing between a 1.2 V core-domain MCU and 3.3 V or 5 V loads. The Agile I/O feature set provides register-level control over pull-up/pull-down, drive strength and input latching, reducing external components. Typical applications include automotive body and zone control modules, sensor and actuator fan-out in AEC-Q100-qualified systems, and industrial I/O modules where an MCU pin budget is exhausted. The Q900 ordering variant targets automotive temperature-grade builds. Design tip: keep the SPI clock at or below 5 MHz and use the reset pin to guarantee defined GPIO states during low-voltage brownouts. This page synthesizes distributor availability, drop-in alternatives, and design guidance not found in the manufacturer datasheet.