10AX115N3F40I2SG vs 10AX115N4F40I3SG Comparison
Detailed side-by-side comparison of 10AX115N3F40I2SG by Intel and 10AX115N4F40I3SG by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | 10AX115N3F40I2SG | 10AX115N4F40I3SG |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7,100.00 | $3,500.00 |
| Series | Arria 10 GX | — |
| Logic Elements | 1,150,000 | — |
| Embedded Memory | 68,857,856 bits (68.86 Mbits) | — |
| User I/Os | 600 | — |
| DSP Blocks | 1,518 (18x19 multipliers) | [DATA_NEEDED: DSP block count] |
| Transceivers | 24 channels | — |
| Max Transceiver Data Rate | 17.4 Gbps | — |
| Process Technology | 20 nm TSMC | — |
| Core Voltage | 0.9 V | — |
| Package | 1517-BBGA, FCBGA (F40) | 1517-BBGA, FCBGA (F40), 40 x 40 mm, 1.00 mm pitch |
| Operating Temperature Grade | Industrial | — |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS Status | Compliant | Compliant |
| Configuration Memory | SRAM-based (volatile, requires external config device) | — |
| Hard Memory Controllers | DDR4 up to 1600 Mbps | — |
| Family | — | Arria 10 GX |
| Logic Elements (LE) | — | 1,150,000 |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count] |
| Embedded Memory Bits | — | 68,857,856 |
| Maximum User I/O | — | 600 |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |
| Maximum Transceiver Data Rate | — | 17.4 Gbps |
| Process Node | — | 20 nm |
| Operating Temperature | — | -40C to +100C (Industrial) |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCC core voltage] |
| Configuration | — | Serial, Parallel, and Avalon-ST supported |
| MSL Level | — | 3 (per JEDEC J-STD-020) |
| Hardened IP | — | PCIe Gen3, 100G Ethernet MAC (per Quartus IP library) |
| Device Family Position | — | Mid-range 20 nm transceiver FPGA |