10AX115N3F40I2SG vs 10AX115N4F40I3SG Comparaison
Comparaison détaillée côte à côte de 10AX115N3F40I2SG par Intel et 10AX115N4F40I3SG par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 10AX115N3F40I2SG | 10AX115N4F40I3SG |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7 100,00 | $3 500,00 |
| Series | Arria 10 GX | — |
| Logic Elements | 1,150,000 | — |
| Embedded Memory | 68,857,856 bits (68.86 Mbits) | — |
| User I/Os | 600 | — |
| DSP Blocks | 1,518 (18x19 multipliers) | [DATA_NEEDED: DSP block count] |
| Transceivers | 24 channels | — |
| Max Transceiver Data Rate | 17.4 Gbps | — |
| Process Technology | 20 nm TSMC | — |
| Core Voltage | 0.9 V | — |
| Boîtier | 1517-BBGA, FCBGA (F40) | 1517-BBGA, FCBGA (F40), 40 x 40 mm, 1.00 mm pitch |
| Operating Temperature Grade | Industrial | — |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Statut RoHS | Compliant | Compliant |
| Configuration Memory | SRAM-based (volatile, requires external config device) | — |
| Hard Memory Controllers | DDR4 up to 1600 Mbps | — |
| Family | — | Arria 10 GX |
| Logic Elements (LE) | — | 1,150,000 |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count] |
| Embedded Memory Bits | — | 68,857,856 |
| Maximum User I/O | — | 600 |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |
| Maximum Transceiver Data Rate | — | 17.4 Gbps |
| Process Node | — | 20 nm |
| Température de fonctionnement | — | -40C to +100C (Industrial) |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCC core voltage] |
| Configuration | — | Serial, Parallel, and Avalon-ST supported |
| Niveau MSL | — | 3 (per JEDEC J-STD-020) |
| Hardened IP | — | PCIe Gen3, 100G Ethernet MAC (per Quartus IP library) |
| Device Family Position | — | Mid-range 20 nm transceiver FPGA |