10AX115N4F40E3LG vs 10AX115N4F45E3LG Comparison
Detailed side-by-side comparison of 10AX115N4F40E3LG by Intel and 10AX115N4F45E3LG by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | 10AX115N4F40E3LG | 10AX115N4F45E3LG |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $6,200.00 | $7,100.00 |
| Product Type | FPGA - Field Programmable Gate Array | — |
| Family | Arria 10 GX | Arria 10 GX |
| Logic Elements (LE) | 1,150,000 | 1,150,000 |
| Adaptive Logic Modules (ALM) | 427,200 | 427,200 |
| Embedded Memory Bits | 68,857,856 (approx. 53 Mb) | — |
| M20K Memory Blocks | 2,738 | — |
| MLAB Memory (Kb) | 12,962 | — |
| DSP Blocks | 600 (variable-precision) | 3,376 (variable-precision, 18x19 multipliers) |
| 18x19 Multipliers | 1,536 | — |
| Maximum User I/O | 624 | — |
| Transceivers | 24 (up to 14.1 Gbps) | Up to 96 channels at up to 17.4 Gbps |
| Transceiver Data Rate | 1.0 to 14.1 Gbps | — |
| PCIe Hard IP | Up to Gen3 x8 | PCIe Gen3 x8 (hard IP block) |
| Process Technology | TSMC 20 nm | TSMC 20nm |
| Core Voltage | 0.85 V / 0.9 V typical | — |
| Package | 1517-BBGA, FCBGA (40 x 40 mm) | 1932-ball FCBGA (F45, 45x45 mm) |
| Operating Temperature | -40C to +100C (extended) | Extended (E) industrial grade per ordering code |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| RoHS Status | Compliant | Compliant |
| Configuration Method | Serial / JTAG / Active Serial (AS) | — |
| Lead-Free | Yes | — |
| Embedded Memory | — | 68,857,856 bits (8,532 Kbits per M20K block) |
| Maximum User I/O Pins | — | 768 |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore |
| Memory Interfaces | — | DDR4, DDR3, QDR-IV, RLDRAM III (hard controller) |
| PLLs | — | 24 |
| MSL Level | — | [DATA_NEEDED: MSL rating] |
| Voltage Rails | — | Core 0.9 V, transceiver 1.0/1.1 V, I/O bank-dependent |