10AX115R3F40E2LG vs 10AX115R3F40I2SG Comparison
Detailed side-by-side comparison of 10AX115R3F40E2LG by Intel and 10AX115R3F40I2SG by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
10AX115R3F40E2LG - Arria 10 GX FPGA, 1.15M LE, 1517-FCBGA | Intel / Altera
10AX115R3F40E2LG ✓ ActiveSpecification Comparison
| Parameter | 10AX115R3F40E2LG | 10AX115R3F40I2SG |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,425.00 | $6,500.00 |
| Family | Arria 10 GX | 10AX115 |
| Product Type | FPGA (Field Programmable Gate Array) | — |
| Logic Elements (LE) | 1,150,000 | — |
| Adaptive Logic Modules (ALM) | [DATA_NEEDED: ALM count] | — |
| Embedded Memory | 68,857,856 bits | 68,857,856 bits |
| DSP Blocks | 1,518 (with integrated hard floating-point) | Yes (variable-precision) |
| Maximum User I/O | 342 | — |
| Number of Pins / Balls | 1517 | — |
| Package Type | FC-FBGA (flip-chip fine-pitch BGA) | — |
| Process Node | 20 nm | 20 nm (TSMC) |
| Core Voltage | 0.9 V | — |
| Maximum Transceiver Data Rate | 28.05 Gbps | — |
| Number of Transceiver Channels | [DATA_NEEDED: transceiver channel count] | — |
| Hard Memory Controller | Yes (DDR4/DDR3/QDR IV) | — |
| Hard PCIe Controller | Yes (PCIe Gen3 x8 hard IP) | — |
| Operating Temperature | -40 C to +100 C (extended) | — |
| Temperature Grade | Extended (E) | Industrial (-40C to +100C) |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS Status | Compliant | Compliant |
| Programming Tool | Intel Quartus Prime Pro / Standard | — |
| Series | — | Arria 10 GX |
| Logic Elements | — | 1,150,000 |
| User I/O Count | — | 342 |
| Package | — | 1517-BBGA, FCBGA (F40) |
| Speed Grade | — | I2 |
| Transceiver Channels | — | 24 (up to 17.4 Gbps) |
| Hard Memory Controllers | — | Yes (DDR4/DDR3) |
| PCIe Hard IP | — | Gen3 |
| MSL Level | — | [DATA_NEEDED: MSL level] |