Intel

10AX115R3F40I2SG - Arria 10 GX FPGA, 1.15M LE, F40 FCBGA | Intel

MPN: 10AX115R3F40I2SG ✓ Active

In Stock Ships in 1-3 business days

1517-BBGA, FCBGA (F40) Package I2 Speed 68,857,856 bits Memory

From $6500 USD / Unit

MOQ: 1 |

Price updated: 2026-09-05

Volume Pricing

Qty	Unit Price	Extended
1	$8281.05	$8,281.05
10	$7800	$78,000.00
100	$7200	$720,000.00
500	$6800	$3,400,000.00
1,000	$6500	$6,500,000.00

ℹ️ All prices are in USD

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10AX115R3F40I2SG Overview

The Intel 10AX115R3F40I2SG is a high-density Arria 10 GX Field-Programmable Gate Array (FPGA) featuring 1,150,000 logic elements, 68,857,856 bits of embedded memory, and 342 user I/O pins in a 1517-ball FCBGA (F40) package. It is the industrial-grade, -I2 speed-grade variant of the 10AX115 device family, offering a balanced trade-off of performance and power for mid-tier applications.

A Field-Programmable Gate Array (FPGA) is a reconfigurable integrated circuit containing an array of programmable logic blocks, interconnect fabric, and embedded resources such as transceivers, memory blocks, and DSP slices. FPGAs sit within the broader taxonomy of programmable logic devices (PLDs) → FPGAs → SRAM-based high-density FPGAs → SoC FPGAs with transceivers. Arria 10 devices represent Intel's mid-range FPGA family, positioned between low-power Cyclone and high-performance Stratix families, and are widely used in communications infrastructure, broadcast video, and high-performance computing.

Key features of the 10AX115R3F40I2SG include 24 high-speed transceiver channels (up to 17.4 Gbps), hard memory controllers supporting DDR4 and DDR3, integrated PCI Express Gen3 hard IP blocks, and a hardened floating-point DSP architecture. The device also embeds variable-precision DSP blocks, partial reconfiguration support, and a 20-channel fabric clock network.

The Arria 10 architecture uses TSMC's 20nm process, providing a favorable performance-per-watt profile versus prior-generation 28nm devices. The integrated transceivers, hard memory controllers, and PCIe Gen3 IP eliminate the need for soft IP implementations, freeing FPGA fabric for application logic.

Typical applications include 4K/8K video processing and broadcast infrastructure, 100G/400G optical transport network line cards, 5G baseband processing, radar and electronic warfare front-ends, and high-performance test & measurement equipment. The high logic density and built-in 17.4 Gbps transceivers make it particularly suited for protocol bridging, packet processing, and high-throughput DSP applications.

When designing with this device, ensure the F40 FCBGA land pattern matches Arria 10 family pin-compatible variants, plan power-rail sequencing for the 0.95V core and 1.2V transceiver supplies, and provide adequate PCB thermal dissipation for the high-density flip-chip BGA.

This page synthesizes distributor pricing, drop-in alternatives within the same F40 FCBGA footprint, and practical design notes not found in the manufacturer datasheet alone.

Drop-in alternatives for 10AX115R3F40I2SG — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

Variants in this series

Same-series models that are drop-in compatible with 10AX115R3F40I2SG (same form factor and footprint) — differing in DSP Blocks, Package, Embedded Memory, Hard Memory Controllers, Family.

10AX115N3F40I2SG

Intel

DSP Blocks: 1,518 (18x19 multipliers)

Embedded Memory: 68,857,856 bits (68.86 Mbits)

Hard Memory Controllers: DDR4 up to 1600 Mbps